DC

Douglas M. Carmean

IN Intel: 30 patents #1,238 of 30,777Top 5%
Microsoft: 14 patents #2,856 of 40,388Top 8%
EL Elwha: 2 patents #175 of 232Top 80%
RT Ross Technology: 1 patents #19 of 27Top 75%
NG Northrop Grumman: 1 patents #690 of 1,695Top 45%
📍 Seattle, WA: #312 of 21,776 inventorsTop 2%
🗺 Washington: #1,200 of 76,902 inventorsTop 2%
Overall (All Time): #57,777 of 4,157,543Top 2%
48
Patents All Time

Issued Patents All Time

Showing 26–48 of 48 patents

Patent #TitleCo-InventorsDate
7797683 Decoupling the number of logical threads from the number of simultaneous physical threads in a processor Per Hammarlund, Stephan Jourdan, Pierre Michaud, Alexandre J. Farcy, Morris Marden +1 more 2010-09-14
7743233 Sequencer address management Hong Wang, Gautham Chinya, Richard Hankins, Shivnandan Kaushik, Bryant Bigbee +13 more 2010-06-22
7158911 Methods and apparatus for thermal management of an integrated circuit die Stephen H. Gunther, Frank Binns, Jack D. Pippin, Linda J. Rankin, Edward A. Burton +1 more 2007-01-02
7159154 Technique for synchronizing faults in a processor having a replay system Yung-Hsiang Lee, Rohit A. Vidwans 2007-01-02
6980918 Methods and apparatus for thermal management of an integrated circuit die Stephen H. Gunther, Frank Binns, Jack D. Pippin, Linda J. Rankin, Edward A. Burton +1 more 2005-12-27
6981129 Breaking replay dependency loops in a processor using a rescheduled replay queue Darrell D. Boggs, Per Hammarlund, Francis X. McKeen, David J. Sager, Ronak Singhal 2005-12-27
6880069 Replay instruction morphing David J. Sager, Thomas Toll, Karol F. Menezes 2005-04-12
6877086 Method and apparatus for rescheduling multiple micro-operations in a processor using a replay queue and a counter Darrell D. Boggs, Per Hammarlund, Francis X. McKeen, David J. Sager, Ronak Singhal 2005-04-05
6789037 Methods and apparatus for thermal management of an integrated circuit die Stephen H. Gunther, Frank Binns, Jack D. Pippin, Linda J. Rankin, Edward A. Burton +1 more 2004-09-07
6708269 Method and apparatus for multi-mode fencing in a microprocessor system Keshavan Tiruvallur, Robert Greiner, Muntaquim Chowdhury, Madhavan Parthasarathy 2004-03-16
6687809 Maintaining processor ordering by checking load addresses of unretired load instructions against snooping store addresses Muntaquim Chowdhury 2004-02-03
6643747 Processing requests to efficiently access a limited bandwidth storage area Per Hammarlund, Michael D. Upton 2003-11-04
6629271 Technique for synchronizing faults in a processor having a replay system Yung-Hsiang Lee, Rohit A. Vidwans 2003-09-30
6611920 Clock distribution system for selectively enabling clock signals to portions of a pipelined circuit Thomas D. Fletcher, Javed S. Barkatullah 2003-08-26
6484254 Method, apparatus, and system for maintaining processor ordering by checking load addresses of unretired load instructions against snooping store addresses Muntaquim Chowdhury 2002-11-19
6370625 Method and apparatus for lock synchronization in a microprocessor system Harish Kumar, Brent E. Lince, Michael D. Upton, Zhongying Zhang 2002-04-09
6366984 Write combining buffer that supports snoop request Brent E. Lince 2002-04-02
6334171 Write-combining device for uncacheable stores Dave L. Hill, Brent E. Lince, Muntaquim Chowdhury 2001-12-25
5809314 Method of monitoring system bus traffic by a CPU operating with reduced power John H. Crawford 1998-09-15
5669003 Method of monitoring system bus traffic by a CPU operating with reduced power John H. Crawford 1997-09-16
5630107 System for loading PLL from bus fraction register when bus fraction register is in either first or second state and bus unit not busy Kathakali Debnath, Roshan Fernando, Robert F. Krick, Keng L. Wong 1997-05-13
5530932 Cache coherent multiprocessing computer system with reduced power operating features John H. Crawford 1996-06-25
5459673 Method and apparatus for optimizing electronic circuits Yatin Mundkur 1995-10-17