| 10657065 |
Delayed write-back in memory |
Thomas Andre, Syed M. Alam, Chitra Subramanian |
2020-05-19 |
$475,000 |
| 10268591 |
Delayed write-back in memory |
Thomas Andre, Syed M. Alam, Chitra Subramanian |
2019-04-23 |
$1,032,000 |
| 10250864 |
Method and apparatus for generating enhanced 3D-effects for real-time and offline applications |
— |
2019-04-02 |
|
| 9990300 |
Delayed write-back in memory |
Thomas Andre, Syed M. Alam, Chitra Subramanian |
2018-06-05 |
$1,250,000 |
| 9967546 |
Method and apparatus for converting 2D-images and videos to 3D for consumer, commercial and professional applications |
— |
2018-05-08 |
|
| 7562316 |
Apparatus for power consumption reduction |
James W. Tschanz, Nasser A. Kurd, Vivek K. De |
2009-07-14 |
$21,399,000 |
| 7342426 |
PLL with controlled VCO bias |
Nasser A. Kurd |
2008-03-11 |
$19,082,000 |
| 7282966 |
Frequency management apparatus, systems, and methods |
Siva G. Narendra, James W. Tschanz, Vivek K. De, Nasser A. Kurd |
2007-10-16 |
$25,589,000 |
| 7133751 |
Method and apparatus for detecting on-die voltage variations |
Nasser A. Kurd |
2006-11-07 |
$13,207,000 |
| 7102402 |
Circuit to manage and lower clock inaccuracies of integrated circuits |
Nasser A. Kurd, Charles E. Dike |
2006-09-05 |
$13,820,000 |
| 7096433 |
Method for power consumption reduction |
James W. Tschanz, Nasser A. Kurd, Vivek K. De |
2006-08-22 |
$20,862,000 |
| 7042259 |
Adaptive frequency clock generation system |
Nasser A. Kurd, Paul D. Madland |
2006-05-09 |
$14,660,000 |
| 7015741 |
Adaptive body bias for clock skew compensation |
James W. Tschanz, Nasser A. Kurd, Siva G. Narendra, Vivek K. De |
2006-03-21 |
$17,683,000 |
| 7009437 |
Smart buffer circuit to match a delay over a range of loads |
Thomas D. Fletcher |
2006-03-07 |
$16,275,000 |
| 6934872 |
Method and apparatus for optimizing clock distribution to reduce the effect of power supply noise |
Keng L. Wong, Hung-Piao Ma, Tawfik M. Rahal-Arabi, Edward A. Burton |
2005-08-23 |
$20,377,000 |
| 6922111 |
Adaptive frequency clock signal |
Nasser A. Kurd |
2005-07-26 |
$33,005,000 |
| 6922112 |
Clock signal generation and distribution via ring oscillators |
Nasser A. Kurd |
2005-07-26 |
$33,005,000 |
| 6882238 |
Method and apparatus for detecting on-die voltage variations |
Nasser A. Kurd |
2005-04-19 |
$25,408,000 |
| 6750689 |
Method and apparatus for correcting a clock duty cycle in a clock distribution network |
Thomas D. Fletcher |
2004-06-15 |
$34,603,000 |
| 6704892 |
Automated clock alignment for testing processors in a bypass mode |
Nasser A. Kurd, Tim Frodsham, David O'Brien |
2004-03-09 |
$36,606,000 |
| 6629255 |
Generating a 2-phase clock using a non-50% divider circuit |
Thomas D. Fletcher |
2003-09-30 |
$25,999,000 |
| 6622255 |
Digital clock skew detection and phase alignment |
Nasser A. Kurd |
2003-09-16 |
$36,866,000 |
| 6611920 |
Clock distribution system for selectively enabling clock signals to portions of a pipelined circuit |
Thomas D. Fletcher, Douglas M. Carmean |
2003-08-26 |
$50,823,000 |
| 6268749 |
Core clock correction in a 2/n mode clocking scheme |
Matthew A. Fisch, Chakrapani Pathikonda |
2001-07-31 |
$265,780,000 |
| 6208180 |
Core clock correction in a 2/N mode clocking scheme |
Matthew A. Fisch, Chakrapani Pathikonda |
2001-03-27 |
$117,605,000 |
