Issued Patents All Time
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6268749 | Core clock correction in a 2/n mode clocking scheme | Matthew A. Fisch, Javed S. Barkatullah | 2001-07-31 |
| 6208180 | Core clock correction in a 2/N mode clocking scheme | Matthew A. Fisch, Javed S. Barkatullah | 2001-03-27 |
| 6114887 | Apparatus for generating bus clock signals with a 1/N characteristic in a 2/N mode clocking scheme | Matthew A. Fisch, Michael W. Rhodehamel | 2000-09-05 |
| 6104219 | Method and apparatus for generating 2/N mode bus clock signals | Javed S. Barkatullah | 2000-08-15 |
| 6061599 | Auto-configuration support for multiple processor-ready pair or FRC-master/checker pair | Michael W. Rhodehamel, Nitin V. Sarangdhar | 2000-05-09 |
| 5862373 | Pad cells for a 2/N mode clocking scheme | Jeff Wight | 1999-01-19 |
| 5834956 | Core clock correction in a 2/N mode clocking scheme | Matthew A. Fisch, Javed S. Barkatullah | 1998-11-10 |
| 5826067 | Method and apparatus for preventing logic glitches in a 2/n clocking scheme | Matthew A. Fisch | 1998-10-20 |
| 5821784 | Method and apparatus for generating 2/N mode bus clock signals | Javed S. Barkatullah | 1998-10-13 |
| 5802132 | Apparatus for generating bus clock signals with a 1/N characteristic in a 2/N mode clocking scheme | Matthew A. Fisch, Michael W. Rhodehamel | 1998-09-01 |