Issued Patents All Time
Showing 76–100 of 175 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7800400 | Configuration random access memory | Irfan Rahim, Myron W. Wong, William Bradley Vest, Jeffrey T. Watt | 2010-09-21 |
| 7800405 | Passgate structures for use in low-voltage applications | Wanli Chang, Cameron McClintock, John E. Turner, Brian Johnson, Chiao Kai Hwang +2 more | 2010-09-21 |
| 7800401 | Fracturable lookup table and logic element | David Lewis, Bruce B. Pedersen, Sinan Kaptanoglu | 2010-09-21 |
| 7768430 | Look-up table based memory | Philip Pan | 2010-08-03 |
| 7737751 | Periphery clock distribution network for a programmable logic device | Gary Lai, Ryan Fung, Vaughn Betz | 2010-06-15 |
| 7705628 | Programmable logic device having logic elements with dedicated hardware to configure look up tables as registers | Michael D. Hutton, Gregg William Baeckler, Jinyong Yuan, Keith Duwel | 2010-04-27 |
| 7702978 | Soft error location and sensitivity detection for programmable devices | David Lewis, Ninh D. Ngo, Joseph Huang | 2010-04-20 |
| 7671625 | Omnibus logic element | James Schleicher, Richard Yuan, Bruce B. Pedersen, Sinan Kaptanoglu, Gregg William Baeckler +4 more | 2010-03-02 |
| 7671626 | Versatile logic element and logic array block | David Lewis, Paul Leventis, Henry Kim, Bruce B. Pedersen, Chris Wysocki +4 more | 2010-03-02 |
| 7656191 | Distributed memory in field-programmable gate array integrated circuit devices | David Lewis, Paul Leventis, Vaughn Betz, Thomas Yau-Tsun Wong, Philip Pan | 2010-02-02 |
| 7605603 | User-accessible freeze-logic for dynamic power reduction and associated methods | Michael D. Hutton | 2009-10-20 |
| 7584447 | PLD architecture for flexible placement of IP function blocks | Cameron McClintock, Brian Johnson, Richard G. Cliff, Srinivas T. Reddy, Chris Lane +3 more | 2009-09-01 |
| 7577055 | Error detection on programmable logic resources | Ninh D. Ngo, Kerry Veenstra | 2009-08-18 |
| 7571413 | Testing circuitry for programmable logic devices with selectable power supply voltages | Jayabrata Ghosh Dastidar, Srinivas Perisetty | 2009-08-04 |
| 7557608 | Passgate structures for use in low-voltage applications | Wanli Chang, Cameron McClintock, John E. Turner, Brian Johnson, Chiao Kai Hwang +2 more | 2009-07-07 |
| 7558812 | Structures for LUT-based arithmetic in PLDs | Ketan Padalia, David Cashman, David Lewis, Jay Schleicher, Jinyong Yuan +1 more | 2009-07-07 |
| 7538579 | Omnibus logic element | James Schleicher, Richard Yuan, Bruce B. Pedersen, Sinan Kaptanoglu, Gregg William Baeckler +4 more | 2009-05-26 |
| 7535275 | High-performance memory interface circuit architecture | Joseph Huang, Chiakang Sung, Philip Pan, Yan Chong, Brian Johnson | 2009-05-19 |
| 7512849 | Reconfigurable programmable logic system with configuration recovery mode | Tim Allen, Michael Fairman, Mario Guzman, Bryan Hoyer, Chris Lane +2 more | 2009-03-31 |
| 7504855 | Multiple data rate memory interface architecture | Brian Johnson | 2009-03-17 |
| 7460431 | Implementation of double data rate embedded memory in programmable devices | Philip Pan | 2008-12-02 |
| 7432734 | Versatile logic element and logic array block | David Lewis, Paul Leventis, Henry Kim, Bruce B. Pedersen, Chris Wysocki +4 more | 2008-10-07 |
| 7405589 | Apparatus and methods for power management in integrated circuits | David Lewis, Christopher F. Lane, Sarathy Sribhashyam, Srinivas Perisetty, Tim Vanderhoek +2 more | 2008-07-29 |
| 7400167 | Apparatus and methods for optimizing the performance of programmable logic devices | David Lewis, Vaughn Betz, Paul Leventis, Christopher F. Lane, Jeffrey T. Watt +1 more | 2008-07-15 |
| 7391236 | Distributed memory in field-programmable gate array integrated circuit devices | David Lewis, Paul Leventis, Vaughn Betz, Thomas Yau-Tsun Wong, Philip Pan | 2008-06-24 |