Issued Patents All Time
Showing 126–150 of 175 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6970014 | Routing architecture for a programmable logic device | David Lewis, Paul Leventis, Brian Johnson, Richard G. Cliff, Srinivas T. Reddy +5 more | 2005-11-29 |
| 6965249 | Programmable logic device with redundant circuitry | Christopher F. Lane, Ketan Zaveri, Hyun Yi, Giles V. Powell, Paul Leventis +7 more | 2005-11-15 |
| 6943580 | Fracturable lookup table and logic element | David Lewis, Bruce B. Pedersen, Sinan Kaptanoglu | 2005-09-13 |
| 6937064 | Versatile logic element and logic array block | David Lewis, Paul Leventis, Henry Kim, Bruce B. Pedersen, Chris Wysocki +4 more | 2005-08-30 |
| 6897678 | Programmable logic device with circuitry for observing programmable logic circuit signals and for preloading programmable logic circuits | Ketan Zaveri, Christopher F. Lane, Srinivas T. Reddy, Cameron McClintock, Bruce B. Pedersen | 2005-05-24 |
| 6895570 | System and method for optimizing routing lines in a programmable logic device | David Lewis, Vaughn Betz, Paul Leventis, Michael Chan, Cameron McClintock +3 more | 2005-05-17 |
| 6879183 | Programmable logic device architectures with super-regions having logic regions and a memory region | David Jefferson, Cameron McClintock, James Schleicher, Manuel Mejia, Bruce B. Pedersen +3 more | 2005-04-12 |
| 6859065 | Use of dangling partial lines for interfacing in a PLD | Brian Johnson, Cameron McClintock, Giles V. Powell, Paul Leventis | 2005-02-22 |
| 6857043 | Shift register implementations of first-in/first-out memories utilizing a double increment gray code counter | Brian Johnson, Richard G. Cliff | 2005-02-15 |
| 6842039 | Configuration shift register | Mario Guzman, Christopher F. Lane, Ninh D. Ngo | 2005-01-11 |
| 6842040 | Differential interconnection circuits in programmable logic devices | Wanli Chang, Cameron McClintock, Richard G. Cliff, Richard Yen-Hsiang Chang | 2005-01-11 |
| 6826741 | Flexible I/O routing resources | Brian Johnson, Cameron McClintock, Triet Nguyen, David Jefferson, Paul Leventis +3 more | 2004-11-30 |
| 6798242 | Programmable logic device with hierarchical interconnection resources | Srinivas T. Reddy, Richard G. Cliff, Christopher F. Lane, Ketan Zaveri, Manuel Mejia +2 more | 2004-09-28 |
| 6661253 | Passgate structures for use in low-voltage applications | Wanli Chang, Cameron McClintock, John E. Turner, Brian Johnson, Chiao Kai Hwang +2 more | 2003-12-09 |
| 6653862 | Use of dangling partial lines for interfacing in a PLD | Brian Johnson, Cameron McClintock, Giles V. Powell, Paul Leventis | 2003-11-25 |
| 6630842 | Routing architecture for a programmable logic device | David Lewis, Paul Leventis, Brian Johnson, Richard G. Cliff, Srinivas T. Reddy +5 more | 2003-10-07 |
| 6605962 | PLD architecture for flexible placement of IP function blocks | Cameron McClintock, Brian Johnson, Richard G. Cliff, Srinivas T. Reddy, Chris Lane +3 more | 2003-08-12 |
| 6577160 | Programmable logic device with hierarchical interconnection resources | Srinivas T. Reddy, Richard G. Cliff, Christopher F. Lane, Ketan Zaveri, Manuel Mejia +2 more | 2003-06-10 |
| 6563367 | Interconnection switch structures | — | 2003-05-13 |
| 6515508 | Differential interconnection circuits in programmable logic devices | Wanli Chang, Cameron McClintock, Richard G. Cliff, Richard Yen-Hsiang Chang | 2003-02-04 |
| 6481000 | Programmable logic device with circuitry for observing programmable logic circuit signals and for preloading programmable logic circuits | Ketan Zaveri, Christopher F. Lane, Srinivas T. Reddy, Cameron McClintock, Bruce B. Pedersen | 2002-11-12 |
| 6480028 | Programmable logic device architectures with super-regions having logic regions and memory region | David Jefferson, Cameron McClintock, James Schleicher, Manuel Mejia, Bruce Pederson +3 more | 2002-11-12 |
| 6462597 | Trip-point adjustment and delay chain circuits | — | 2002-10-08 |
| 6462577 | Configurable memory structures in a programmable logic device | Christopher F. Lane, Srinivas T. Reddy, Brian Johnson, Ketan Zaveri, Mario Guzman +1 more | 2002-10-08 |
| 6417694 | Programmable logic device with hierarchical interconnection resources | Srinivas T. Reddy, Richard G. Cliff, Christopher F. Lane, Ketan Zaveri, Manuel Mejia +2 more | 2002-07-09 |