Issued Patents All Time
Showing 25 most recent of 70 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7800405 | Passgate structures for use in low-voltage applications | Andy L. Lee, Wanli Chang, Cameron McClintock, Brian Johnson, Chiao Kai Hwang +2 more | 2010-09-21 |
| 7684532 | Clock data recovery circuitry associated with programmable logic device circuitry | Edward Aung, Henry Y. Lui, Paul Butler, Rakesh Patel, Chong H. Lee | 2010-03-23 |
| 7602634 | Dynamic RAM storage techniques | — | 2009-10-13 |
| 7557608 | Passgate structures for use in low-voltage applications | Andy L. Lee, Wanli Chang, Cameron McClintock, Brian Johnson, Chiao Kai Hwang +2 more | 2009-07-07 |
| 7465971 | Integrated circuit structures for increasing resistance to single event upset | Lakhbeer S. Sidhu, Irfan Rahim, Jeffrey T. Watt | 2008-12-16 |
| 7333570 | Clock data recovery circuitry associated with programmable logic device circuitry | Edward Aung, Henry Y. Lui, Paul Butler, Rakesh Patel, Chong H. Lee | 2008-02-19 |
| 7319253 | Integrated circuit structures for increasing resistance to single event upset | Lakhbeer S. Sidhu, Irfan Rahim, Jeffrey T. Watt | 2008-01-15 |
| 7298646 | Apparatus for configuring programmable logic devices and associated methods | — | 2007-11-20 |
| 7277316 | Dynamic RAM storage techniques | — | 2007-10-02 |
| 7227918 | Clock data recovery circuitry associated with programmable logic device circuitry | Edward Aung, Henry Y. Lui, Paul Butler, Rakesh Patel, Chong H. Lee | 2007-06-05 |
| 7119574 | Passage structures for use in low-voltage applications | Andy L. Lee, Wanli Chang, Cameron McClintock, Brian Johnson, Chiao Kai Hwang +2 more | 2006-10-10 |
| 7088606 | Dynamic RAM storage techniques | — | 2006-08-08 |
| 6952114 | Apparatus and methods for silicon-on-insulator transistors in programmable logic devices | — | 2005-10-04 |
| 6876572 | Programmable logic devices with stabilized configuration cells for reduced soft error rates | — | 2005-04-05 |
| 6828620 | Nonvolatile memory cell with low doping region | Christopher J. Pass, James D. Sansbury, Raminda Udaya Madurawe, Rakesh Patel, Peter J. Wright | 2004-12-07 |
| 6781409 | Apparatus and methods for silicon-on-insulator transistors in programmable logic devices | — | 2004-08-24 |
| 6724222 | Programmable logic with lower internal voltage circuitry | Rakesh Patel, John Lam, Wilson Wong | 2004-04-20 |
| 6661253 | Passgate structures for use in low-voltage applications | Andy L. Lee, Wanli Chang, Cameron McClintock, Brian Johnson, Chiao Kai Hwang +2 more | 2003-12-09 |
| 6629311 | Apparatus and method for configuring a programmable logic device with a configuration controller operating as an interface to a configuration memory | Denis Berlan | 2003-09-30 |
| 6604228 | Technique of fabricating integrated circuits having interfaces compatible with different operating voltage conditions | Rakesh Patel | 2003-08-05 |
| 6583646 | Overvoltage-tolerant interface for integrated circuits | Rakesh Patel, Wilson Wong | 2003-06-24 |
| 6573138 | Nonvolatile memory cell with low doping region | Christopher J. Pass, James D. Sansbury, Raminda Udaya Madurawe, Rakesh Patel, Peter J. Wright | 2003-06-03 |
| 6563343 | Circuitry for a low internal voltage | Rakesh Patel, John Lam, Wilson Wong | 2003-05-13 |
| 6472903 | Programmable logic device input/output architecture with power bus segmentation for multiple I/O standards | Kerry Veenstra, Krishna Rangasayee | 2002-10-29 |
| 6433585 | Overvoltage-tolerant interface for integrated circuits | Rakesh Patel, Wilson Wong | 2002-08-13 |