| 6879183 |
Programmable logic device architectures with super-regions having logic regions and a memory region |
David Jefferson, Cameron McClintock, James Schleicher, Andy L. Lee, Bruce B. Pedersen +3 more |
2005-04-12 |
| 6798242 |
Programmable logic device with hierarchical interconnection resources |
Srinivas T. Reddy, Richard G. Cliff, Christopher F. Lane, Ketan Zaveri, David Jefferson +2 more |
2004-09-28 |
| 6577160 |
Programmable logic device with hierarchical interconnection resources |
Srinivas T. Reddy, Richard G. Cliff, Christopher F. Lane, Ketan Zaveri, David Jefferson +2 more |
2003-06-10 |
| 6480028 |
Programmable logic device architectures with super-regions having logic regions and memory region |
David Jefferson, Cameron McClintock, James Schleicher, Andy L. Lee, Bruce Pederson +3 more |
2002-11-12 |
| 6417694 |
Programmable logic device with hierarchical interconnection resources |
Srinivas T. Reddy, Richard G. Cliff, Christopher F. Lane, Ketan Zaveri, David Jefferson +2 more |
2002-07-09 |
| 6392954 |
Dual port programmable logic device variable depth and width memory array |
Srinivas T. Reddy, Christopher F. Lane, Richard G. Cliff, Kerry Veenstra |
2002-05-21 |
| 6344755 |
Programmable logic device with redundant circuitry |
Srinivas T. Reddy, Andy L. Lee, Bruce B. Pedersen |
2002-02-05 |
| 6335634 |
Circuitry and methods for internal interconnection of programmable logic devices |
Srinivas T. Reddy, Ketan Zaveri, Christopher F. Lane, Andy L. Lee, Cameron McClintock +2 more |
2002-01-01 |
| 6300794 |
Programmable logic device with hierarchical interconnection resources |
Srinivas T. Reddy, Richard G. Cliff, Christopher F. Lane, Ketan Zaveri, David Jefferson +2 more |
2001-10-09 |
| 6288970 |
Programmable logic device memory array circuit having combinable single-port memory arrays |
Srinivas T. Reddy, Christopher F. Lane |
2001-09-11 |
| 6215326 |
Programmable logic device architecture with super-regions having logic regions and a memory region |
David Jefferson, Cameron McClintock, James Schleicher, Andy L. Lee, Bruce B. Pedersen +3 more |
2001-04-10 |
| 6201404 |
Programmable logic device with redundant circuitry |
Srinivas T. Reddy, Andy L. Lee, Bruce B. Pedersen |
2001-03-13 |
| 6191998 |
Programmable logic device memory array circuit having combinable single-port memory arrays |
Srinivas T. Reddy, Christopher F. Lane |
2001-02-20 |
| 6172900 |
Compact, low voltage, noise-immune RAM cell |
— |
2001-01-09 |
| 6107824 |
Circuitry and methods for internal interconnection of programmable logic devices |
Srinivas T. Reddy, Ketan Zaveri, Christopher F. Lane, Andy L. Lee, Cameron McClintock +2 more |
2000-08-22 |
| 6094064 |
Programmable logic device incorporating and input/output overflow bus |
David Jefferson, Srinivas T. Reddy |
2000-07-25 |
| 6052327 |
Dual-port programmable logic device variable depth and width memory array |
Srinivas T. Reddy, Christopher F. Lane, Richard G. Cliff, Kerry Veenstra |
2000-04-18 |
| 6040712 |
Apparatus and method for protecting a circuit during a hot socket condition |
— |
2000-03-21 |
| 5977793 |
Programmable logic device with hierarchical interconnection resources |
Srinivas T. Reddy, Richard G. Cliff, Christopher F. Lane, Ketan Zaveri, David Jefferson +2 more |
1999-11-02 |
| 5883526 |
Hierarchical interconnect for programmable logic devices |
Srinivas T. Reddy |
1999-03-16 |
| 5872529 |
Dynamic datastream compression/decompression |
— |
1999-02-16 |