Issued Patents All Time
Showing 25 most recent of 66 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10177766 | Omnibus logic element | James Schleicher, Richard Yuan, Bruce B. Pedersen, Gregg William Baeckler, David Lewis +4 more | 2019-01-08 |
| 9496875 | Omnibus logic element | James Schleicher, Richard Yuan, Bruce B. Pedersen, Gregg William Baeckler, David Lewis +4 more | 2016-11-15 |
| 9270279 | Apparatus and methods for time-multiplex field-programmable gate arrays | David W. Mendel | 2016-02-23 |
| 8990757 | Dedicated interface architecture for a hybrid integrated circuit | King W. Chan, William Shu, Chi Fung Cheng | 2015-03-24 |
| 8878567 | Omnibus logic element | James Schleicher, Richard Yuan, Bruce B. Pedersen, Gregg William Baeckler, David Lewis +4 more | 2014-11-04 |
| 8856711 | Apparatus and methods for time-multiplex field-programmable gate arrays | David W. Mendel | 2014-10-07 |
| 8593174 | Omnibus logic element for packing or fracturing | James Schleicher, Richard Yuan, Bruce B. Pedersen, Gregg William Baeckler, David Lewis +4 more | 2013-11-26 |
| 8543955 | Apparatus and methods for time-multiplex field-programmable gate arrays | David W. Mendel | 2013-09-24 |
| 8258811 | Enhanced field programmable gate array | Samuel W. Beal, Jung-Cheun Lien, William Shu, King W. Chan, William C. Plants | 2012-09-04 |
| 8237465 | Omnibus logic element for packing or fracturing | James Schleicher, Richard Yuan, Bruce B. Pedersen, Gregg William Baeckler, David Lewis +4 more | 2012-08-07 |
| 8225259 | Apparatus and methods for time-multiplex field-programmable gate arrays with multiple clocks | David W. Mendel | 2012-07-17 |
| 8217678 | Fracturable lookup table and logic element | David Lewis, Bruce B. Pedersen, Andy L. Lee | 2012-07-10 |
| 8082526 | Dedicated crossbar and barrel shifter block on programmable logic resources | Michael D. Hutton | 2011-12-20 |
| 7977970 | Enhanced field programmable gate array | Samuel W. Beal, Jung-Cheun Lien, William Shu, King W. Chan, William C. Plants | 2011-07-12 |
| 7944238 | (N+1) input flip-flop packing with logic in FPGA architectures | — | 2011-05-17 |
| 7924053 | Clustered field programmable gate array architecture | Wenyi Feng | 2011-04-12 |
| 7924052 | Field programmable gate array architecture having Clos network-based input interconnect | Wenyi Feng, Jonathan W. Greene | 2011-04-12 |
| 7911230 | Omnibus logic element for packing or fracturing | James Schleicher, Richard Yuan, Bruce B. Pedersen, Gregg William Baeckler, David Lewis +4 more | 2011-03-22 |
| 7800401 | Fracturable lookup table and logic element | David Lewis, Bruce B. Pedersen, Andy L. Lee | 2010-09-21 |
| 7701250 | (N+1) input flip-flop packing with logic in FPGA architectures | — | 2010-04-20 |
| 7671625 | Omnibus logic element | James Schleicher, Richard Yuan, Bruce B. Pedersen, Gregg William Baeckler, David Lewis +4 more | 2010-03-02 |
| 7579868 | Architecture for routing resources in a field programmable gate array | — | 2009-08-25 |
| 7557612 | Block symmetrization in a field programmable gate array | — | 2009-07-07 |
| 7557611 | Block level routing architecture in a field programmable gate array | — | 2009-07-07 |
| 7545169 | FPGA architecture having two-level cluster input interconnect scheme without bandwidth limitation | Wenyi Feng | 2009-06-09 |