Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
JG

Jonathan W. Greene — 59 Patents

ACActel: 35 patents #4 of 156Top 3%
MSMicrosemi Soc: 21 patents #2 of 42Top 5%
MIMicrochip Technology Incorporated: 2 patents #307 of 958Top 35%
ACActall: 1 patents #7 of 13Top 55%
Palo Alto, CA: #284 of 9,675 inventorsTop 3%
California: #6,060 of 386,348 inventorsTop 2%
Overall (All Time): #40,067 of 4,157,543Top 1%
59 Patents All Time
Jonathan W. Greene has been granted 59 US patents while listed as an inventor at Actel. The first was granted in 1989 and the most recent in February 2025. Jonathan W. Greene ranks #40,067 of 4,157,543 US inventors in our database (top 0.96%). Patent records list Jonathan W. Greene in Palo Alto, CA, US.

Patents per Year

Patents granted per year, 1989 to 2025Bar chart with a peak of 6 patents in 2011.peak 61989: 1 patents19891990: 1 patents1991: 2 patents1992: 2 patents19921993: 2 patents1995: 1 patents1997: 1 patents19971998: 1 patents2006: 1 patents2007: 1 patents20072008: 4 patents2009: 5 patents2010: 3 patents20102011: 6 patents2012: 3 patents2013: 2 patents20132014: 2 patents2015: 6 patents2016: 1 patents20162017: 1 patents2018: 2 patents2019: 3 patents20192020: 2 patents2021: 3 patents2023: 2 patents20232025: 1 patents2025

Issued Patents All Time

Showing 1–25 of 59 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12223322 Embedded processor supporting fixed-function kernels Aaron Severance, Joel Vandergriendt 2025-02-11
11671099 Logic cell for programmable gate array Marcel Derevlean 2023-06-06 $49,974,000
11544349 Method for combining analog neural net with FPGA routing in a monolithic integrated circuit John McCollum, Gregory Bakker 2023-01-03
11023559 Apparatus and method for combining analog neural net with FPGA routing in a monolithic integrated circuit John McCollum, Gregory Bakker 2021-06-01
10971216 SRAM configuration cell for low-power field programmable gate arrays John McCollum 2021-04-06
10936286 FPGA logic cell with improved support for counters Joel Landry 2021-03-02
10855286 Front to back resistive random-access memory cells Frank Hawley, John McCollum 2020-12-01
10714180 Hybrid configuration memory cell John McCollum 2020-07-14
10523208 Efficient lookup table modules for user-programmable integrated circuits Volker Hecht 2019-12-31
10361702 FPGA math block with dedicated connections Fei Li 2019-07-23
10256822 Front to back resistive random access memory cells Frank Hawley, John McCollum 2019-04-09
10020811 FPGA RAM blocks optimized for use as register files Joel Landry, William C. Plants, Wenyi Feng 2018-07-10
9991894 Resistive random access memory cells Frank Hawley, John McCollum 2018-06-05
9780792 FPGA RAM blocks optimized for use as register files Joel Landry, William C. Plants, Wenyi Feng 2017-10-03
9514804 Multi-state configuration RAM cell 2016-12-06
9170774 Fast carry lookahead circuits Volker Hecht, Marcel Derevlean 2015-10-27
9147836 Layouts for resistive RAM cells Frank Hawley, John McCollum 2015-09-29
9147025 Method for efficient FPGA packing Wenyi Feng, Kristofer Vorwerk, Val Pevzner, Arunangshu Kundu 2015-09-29
9103880 On-chip probe circuit for detecting faults in an FPGA Dirk Kannemacher, Volker Hecht, Theodore Speers 2015-08-11
9000807 On-chip probe circuit for detecting faults in an FPGA Dirk Kannemacher, Volker Hecht, Theodore Speers 2015-04-07
8981328 Back to back resistive random access memory cells Frank Hawley, John McCollum 2015-03-17
8868820 RAM block designed for efficient ganging Volker Hecht 2014-10-21
8723151 Front to back resistive random access memory cells Frank Hawley, John McCollum 2014-05-13
8446170 FPGA RAM blocks optimized for use as register files Joel Landry, William C. Plants, Wenyi Feng 2013-05-21
8415650 Front to back resistive random access memory cells Frank Hawley, John McCollum 2013-04-09