| 10177766 |
Omnibus logic element |
James Schleicher, Bruce B. Pedersen, Sinan Kaptanoglu, Gregg William Baeckler, David Lewis +4 more |
2019-01-08 |
| 9496875 |
Omnibus logic element |
James Schleicher, Bruce B. Pedersen, Sinan Kaptanoglu, Gregg William Baeckler, David Lewis +4 more |
2016-11-15 |
| 8878567 |
Omnibus logic element |
James Schleicher, Bruce B. Pedersen, Sinan Kaptanoglu, Gregg William Baeckler, David Lewis +4 more |
2014-11-04 |
| 8593174 |
Omnibus logic element for packing or fracturing |
James Schleicher, Bruce B. Pedersen, Sinan Kaptanoglu, Gregg William Baeckler, David Lewis +4 more |
2013-11-26 |
| 8402408 |
Register retiming technique |
Babette van Antwerpen, Michael D. Hutton, Gregg William Baeckler |
2013-03-19 |
| 8237465 |
Omnibus logic element for packing or fracturing |
James Schleicher, Bruce B. Pedersen, Sinan Kaptanoglu, Gregg William Baeckler, David Lewis +4 more |
2012-08-07 |
| 8108812 |
Register retiming technique |
Babette van Antwerpen, Michael D. Hutton, Gregg William Baeckler |
2012-01-31 |
| 7911230 |
Omnibus logic element for packing or fracturing |
James Schleicher, Bruce B. Pedersen, Sinan Kaptanoglu, Gregg William Baeckler, David Lewis +4 more |
2011-03-22 |
| 7689955 |
Register retiming technique |
Babette van Antwerpen, Michael D. Hutton, Gregg William Baeckler |
2010-03-30 |
| 7671625 |
Omnibus logic element |
James Schleicher, Bruce B. Pedersen, Sinan Kaptanoglu, Gregg William Baeckler, David Lewis +4 more |
2010-03-02 |
| 7594208 |
Techniques for automated sweeping of parameters in computer-aided design to achieve optimum performance and resource usage |
Terry Borer, Ian Chesal, James Schleicher, David W. Mendel, Mike Hutton +7 more |
2009-09-22 |
| 7565388 |
Logic cell supporting addition of three binary words |
Gregg William Baeckler, Martin Langhammer, James Schleicher |
2009-07-21 |
| 7538579 |
Omnibus logic element |
James Schleicher, Bruce B. Pedersen, Sinan Kaptanoglu, Gregg William Baeckler, David Lewis +4 more |
2009-05-26 |
| 7337100 |
Physical resynthesis of a logic design |
Michael D. Hutton, Joachim Pistorius, Babette van Antwerpen, Gregg William Baeckler, Yean-Yow Hwang |
2008-02-26 |
| 7194723 |
Techniques for mapping functions to lookup tables on programmable circuits |
Yean-Yow Hwang |
2007-03-20 |
| 7181703 |
Techniques for automated sweeping of parameters in computer-aided design to achieve optimum performance and resource usage |
Terry Borer, Ian Chesal, James Schleicher, David W. Mendel, Mike Hutton +7 more |
2007-02-20 |
| 7171633 |
Estimating quality during early synthesis |
Yean-Yow Hwang, Babette van Antwerpen |
2007-01-30 |
| 7167022 |
Omnibus logic element including look up table based logic elements |
James Schleicher, Bruce B. Pedersen, Sinan Kaptanoglu, Gregg William Baeckler, David Lewis +4 more |
2007-01-23 |
| 7120883 |
Register retiming technique |
Babette van Antwerpen, Michael D. Hutton, Gregg William Baeckler |
2006-10-10 |