Issued Patents All Time
Showing 76–88 of 88 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10020254 | Integration of super via structure in BEOL | Ruqiang Bao, Joe Lee, Yann Mignot, Hosadurga Shobha, Junli Wang | 2018-07-10 |
| 9991365 | Forming vertical transport field effect transistors with uniform bottom spacer thickness | Kangguo Cheng, Xuefeng Liu, Peng Xu | 2018-06-05 |
| 9984919 | Inverted damascene interconnect structures | Xunyuan Zhang, Chanro Park, Peng Xu, Yann Mignot | 2018-05-29 |
| 9837351 | Avoiding gate metal via shorting to source or drain contacts | Victor Chan, Xuefeng Liu, Yann Mignot | 2017-12-05 |
| 9490168 | Via formation using sidewall image transfer process to define lateral dimension | Shyng-Tsong Chen, Cheng Chi, Chi-Chun Liu, Sylvie Mignot, Yann Mignot +3 more | 2016-11-08 |
| 9406746 | Work function metal fill for replacement gate fin field effect transistor process | Hong He, Junli Wang, Yunpeng Yin | 2016-08-02 |
| 9330965 | Double self aligned via patterning | Hsueh-Chung Chen, Yunpeng Yin, Ailian Zhao | 2016-05-03 |
| 9257334 | Double self-aligned via patterning | Hsueh-Chung Chen, Yunpeng Yin, Ailian Zhao | 2016-02-09 |
| 9219007 | Double self aligned via patterning | Hsueh-Chung Chen, Yunpeng Yin, Ailian Zhao | 2015-12-22 |
| 9064813 | Trench patterning with block first sidewall image transfer | Sivananda K. Kanakasabapathy, Chiahsun Tseng, Yunpeng Yin | 2015-06-23 |
| 8927198 | Method to print contact holes at high resolution | Martin Burkhardt | 2015-01-06 |
| 8298467 | Method of low temperature imprinting process with high pattern transfer yield | Hong Yee Low | 2012-10-30 |
| 7901607 | Method of low temperature imprinting process with high pattern transfer yield | Hong Yee Low | 2011-03-08 |