TD

Timothy H. Daubenspeck

IBM: 150 patents #285 of 70,183Top 1%
Globalfoundries: 14 patents #253 of 4,424Top 6%
UL Ultratech: 3 patents #25 of 110Top 25%
📍 Colchester, VT: #3 of 432 inventorsTop 1%
🗺 Vermont: #23 of 4,968 inventorsTop 1%
Overall (All Time): #4,967 of 4,157,543Top 1%
167
Patents All Time

Issued Patents All Time

Showing 101–125 of 167 patents

Patent #TitleCo-InventorsDate
7862987 Method for forming an electrical structure comprising multiple photosensitive materials Jeffrey P. Gambino, Christopher D. Muzzy, Wolfgang Sauter 2011-01-04
7863734 Dual-sided chip attached modules Kerry Bernstein, Timothy J. Dalton, Jeffrey P. Gambino, Mark D. Jaffe, Christopher D. Muzzy +3 more 2011-01-04
7859122 Final via structures for bond pad-solder ball interconnections Jeffrey P. Gambino, Christopher D. Muzzy, David L. Questad, Wolfgang Sauter 2010-12-28
7843069 Wire bond pads Jeffrey P. Gambino, Christopher D. Muzzy, Wolfgang Sauter 2010-11-30
7825511 Undercut-free BLM process for Pb-free and Pb-reduced C4 Jeffrey P. Gambino, Christopher D. Muzzy, Wolfgang Sauter 2010-11-02
7777339 Semiconductor chips with reduced stress from underfill at edge of chip Jeffrey P. Gambino, Christopher D. Muzzy, Wolfgang Sauter 2010-08-17
7709876 Gap capacitors for monitoring stress in solder balls in flip chip technology Stephen P. Ayotte, Jeffrey P. Gambino, Christopher D. Muzzy, Wolfgang Sauter 2010-05-04
7704804 Method of forming a crack stop laser fuse with fixed passivation layer coverage Jeffrey P. Gambino, Christopher D. Muzzy, Wolfgang Sauter 2010-04-27
7682961 Methods of forming solder connections and structure thereof Jeffrey P. Gambino, Christopher D. Muzzy, Wolfgang Sauter 2010-03-23
7635643 Method for forming C4 connections on integrated circuit chips and the resulting devices Mukta G. Farooq, Jeffrey P. Gambino, Christopher D. Muzzy, Kevin S. Petrarca, Wolfgang Sauter 2009-12-22
7614147 Method of creating contour structures to highlight inspection region Jeffrey P. Gambino, Christopher D. Muzzy, Wolfgang Sauter 2009-11-10
7601628 Wire and solder bond forming methods Jeffrey P. Gambino, Christopher D. Muzzy, Wolfgang Sauter 2009-10-13
7547576 Solder wall structure in flip-chip technologies Jeffrey P. Gambino, Christopher D. Muzzy, Wolfgang Sauter 2009-06-16
7545050 Design structure for final via designs for chip stress reduction Wolfgang Sauter, Jeffrey P. Gambino, David L. Questad 2009-06-09
7541272 Damascene patterning of barrier layer metal for C4 solder bumps Jeffrey P. Gambino, Christopher D. Muzzy, Wolfgang Sauter 2009-06-02
7521287 Wire and solder bond forming methods Jeffrey P. Gambino, Christopher D. Muzzy, Wolfgang Sauter 2009-04-21
7521336 Crack stop for low K dielectrics Jeffrey P. Gambino, Stephen E. Luce, Thomas L. McDevitt, William T. Motsiff, Mark J. Pouliot +1 more 2009-04-21
7517789 Solder bumps in flip-chip technologies Jeffrey P. Gambino, Christopher D. Muzzy, Wolfgang Sauter 2009-04-14
7485564 Undercut-free BLM process for Pb-free and Pb-reduced C4 Jeffrey P. Gambino, Christopher D. Muzzy, Wolfgang Sauter 2009-02-03
7482675 Probing pads in kerf area for wafer testing James W. Adkisson, Jeffrey P. Gambino, Christopher D. Muzzy, Wolfgang Sauter 2009-01-27
7479447 Method of forming a crack stop void in a low-k dielectric layer between adjacent fuses Christopher D. Muzzy, Paul S. McLaughlin, Judith A. Wright, Jean Wynne, Dae Young Jung 2009-01-20
7462509 Dual-sided chip attached modules Kerry Bernstein, Timothy J. Dalton, Jeffrey P. Gambino, Mark D. Jaffe, Christopher D. Muzzy +3 more 2008-12-09
7459785 Electrical interconnection structure formation Jeffrey P. Gambino, Christopher D. Muzzy, Wolfgang Sauter 2008-12-02
7439170 Design structure for final via designs for chip stress reduction Wolfgang Sauter, Jeffrey P. Gambino, David L. Questad 2008-10-21
7411135 Contour structures to highlight inspection regions Jeffrey P. Gambino, Christopher D. Muzzy, Wolfgang Sauter 2008-08-12