| 10295592 |
Pre-test power-optimized bin reassignment following selective voltage binning |
Igor Arsovski, Jeanne P. Bickford, Paul J. Grzymkowski, Susan K. Lichtensteiger, Robert McMahon +2 more |
2019-05-21 |
| 9759767 |
Pre-test power-optimized bin reassignment following selective voltage binning |
Igor Arsovski, Jeanne P. Bickford, Paul J. Grzymkowski, Susan K. Lichtensteiger, Robert McMahon +2 more |
2017-09-12 |
| 9653330 |
Threshold voltage (VT)-type transistor sensitive and/or fan-out sensitive selective voltage binning |
Jeanne P. Bickford, John R. Goss, Robert McMahon, Troy J. Perry |
2017-05-16 |
| 7620931 |
Method of adding fabrication monitors to integrated circuit chips |
James W. Adkisson, Greg Bazan, John M. Cohn, Matthew S. Grady, David P. Vallett |
2009-11-17 |
| 7453973 |
Diagnostic method and apparatus for non-destructively observing latch data |
Darren L. Anand, John R. Goss, Peter O. Jacobsen, Michael R. Ouellette, Donald L. Wheater |
2008-11-18 |
| 7323278 |
Method of adding fabrication monitors to integrated circuit chips |
James W. Adkisson, Greg Bazan, John M. Cohn, Matthew S. Grady, David P. Vallett |
2008-01-29 |
| 7285860 |
Method and structure for defect monitoring of semiconductor devices using power bus wiring grids |
John M. Cohn, Leah Pastel, David P. Vallett |
2007-10-23 |
| 7239167 |
Utilizing clock shield as defect monitor |
John M. Cohn, Leah Pastel, David P. Vallett |
2007-07-03 |
| 7240322 |
Method of adding fabrication monitors to integrated circuit chips |
James W. Adkisson, Greg Bazan, John M. Cohn, Matthew S. Grady, David P. Vallett |
2007-07-03 |
| 7194706 |
Designing scan chains with specific parameter sensitivities to identify process defects |
James W. Adkisson, Greg Bazan, John M. Cohn, Matthew S. Grady, Leendert M. Huisman +5 more |
2007-03-20 |
| 7145977 |
Diagnostic method and apparatus for non-destructively observing latch data |
Darren L. Anand, John R. Goss, Peter O. Jakobsen, Michael R. Ouellette, Donald L. Wheater |
2006-12-05 |
| 7089514 |
Defect diagnosis for semiconductor integrated circuits |
James W. Adkisson, Greg Bazan, John M. Cohn, Francis Gravel, Leendert M. Huisman +4 more |
2006-08-08 |
| 7088124 |
Utilizing clock shield as defect monitor |
John M. Cohn, Leah Pastel, David P. Vallett |
2006-08-08 |
| 7078248 |
Method and structure for defect monitoring of semiconductor devices using power bus wiring grids |
John M. Cohn, Leah Pastel, David P. Vallett |
2006-07-18 |
| 7007214 |
Diagnosable scan chain |
Steven M. Eustis, Leah Pastel, Thomas R. Bednar, Jeffery H. Oppold |
2006-02-28 |
| 7005874 |
Utilizing clock shield as defect monitor |
John M. Cohn, Leah Pastel, David P. Vallett |
2006-02-28 |
| 6998866 |
Circuit and method for monitoring defects |
Greg Bazan, John M. Cohn, Matthew S. Grady, Phillip J. Nigh, Leah Pastel |
2006-02-14 |
| 5925143 |
Scan-bypass architecture without additional external latches |
Pamela S. Gillis, Ravi Kolagotla, Dennis A. Miller, Maria Noack, Steven F. Oakland +2 more |
1999-07-20 |
| 5719879 |
Scan-bypass architecture without additional external latches |
Pamela S. Gillis, Ravi Kolagotla, Dennis A. Miller, Maria Noack, Steven F. Oakland +2 more |
1998-02-17 |
