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USPTO Patent Rankings Data through Dec 31, 2025
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Matthew S. Grady — 15 Patents

IBM: 15 patents #7,470 of 70,183Top 15%
Burlington, VT: #44 of 475 inventorsTop 10%
Vermont: #507 of 4,968 inventorsTop 15%
Overall (All Time): #307,048 of 4,157,543Top 8%
15 Patents All Time
Matthew S. Grady has been granted 15 US patents while listed as an inventor at IBM. The first was granted in 2003 and the most recent in May 2016. Matthew S. Grady ranks #307,048 of 4,157,543 US inventors in our database (top 7.4%). Patent records list Matthew S. Grady in Burlington, VT, US.

Issued Patents All Time

Showing 1–15 of 15 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
9336109 Real-time rule engine for adaptive testing of integrated circuits David E. Atkinson, Donald L. LaCroix, David B. Lutton, II, Bradley D. Pepper, Randolph P. Steel 2016-05-10 $4,731,000
9311201 Real-time rule engine for adaptive testing of integrated circuits David E. Atkinson, Donald L. LaCroix, David B. Lutton, II, Bradley D. Pepper, Randolph P. Steel 2016-04-12 $2,843,000
8689066 Integrated circuit test optimization using adaptive test pattern sampling algorithm Mark C. Johnson, Bradley D. Pepper, Dean G. Percy, Joseph C. Pranys 2014-04-01 $5,095,000
8087823 Method for monitoring thermal control Francois Aube, Timothy M. Curtin, Thomas P. Scanlon, Eric N. Smith 2012-01-03 $8,800,000
7620931 Method of adding fabrication monitors to integrated circuit chips James W. Adkisson, Greg Bazan, John M. Cohn, Thomas G. Sopchak, David P. Vallett 2009-11-17 $17,738,000
7323278 Method of adding fabrication monitors to integrated circuit chips James W. Adkisson, Greg Bazan, John M. Cohn, Thomas G. Sopchak, David P. Vallett 2008-01-29 $11,919,000
7240322 Method of adding fabrication monitors to integrated circuit chips James W. Adkisson, Greg Bazan, John M. Cohn, Thomas G. Sopchak, David P. Vallett 2007-07-03 $6,885,000
7194706 Designing scan chains with specific parameter sensitivities to identify process defects James W. Adkisson, Greg Bazan, John M. Cohn, Leendert M. Huisman, Mark D. Jaffe +5 more 2007-03-20 $5,658,000
7139944 Method and system for determining minimum post production test time required on an integrated circuit device to achieve optimum reliability Tange Barbour, Thomas S. Barnett, William V. Huott, Michael R. Ouellette 2006-11-21 $6,127,000
6998866 Circuit and method for monitoring defects Greg Bazan, John M. Cohn, Phillip J. Nigh, Leah Pastel, Thomas G. Sopchak 2006-02-14 $5,958,000
6909274 Signal pin tester for AC defects in integrated circuits Frank W. Angelotti, Louis Bernard Bushard, Scott A. Strissel 2005-06-21 $6,933,000
6789032 Method of statistical binning for reliability selection Tange Barbour, Thomas S. Barnett, Kathleen G. Purdy 2004-09-07 $9,920,000
6754864 System and method to predetermine a bitmap of a self-tested embedded array David Gangl, David Iverson, Gary W. Maier, Robert Edward Shearer, Donald L. Wheater 2004-06-22 $6,022,000
6590382 Signal pin tester for AC defects in integrated circuits Frank W. Angelotti, Louis Bernard Bushard, Scott A. Strissel 2003-07-08 $17,066,000
6557132 Method and system for determining common failure modes for integrated circuits David Gangl, David Iverson, Kenneth A. Lavallee, Robert Edward Shearer 2003-04-29 $13,645,000