SH

Steven J. Holmes

IBM: 329 patents #61 of 70,183Top 1%
Globalfoundries: 6 patents #578 of 4,424Top 15%
FS Freeescale Semiconductor: 2 patents #1,335 of 3,767Top 40%
HL Highlight Games Limited: 2 patents #3 of 7Top 45%
📍 Ossining, NY: #1 of 613 inventorsTop 1%
🗺 New York: #46 of 115,490 inventorsTop 1%
Overall (All Time): #943 of 4,157,543Top 1%
341
Patents All Time

Issued Patents All Time

Showing 326–341 of 341 patents

Patent #TitleCo-InventorsDate
5939767 Structure and process for buried diode formation in CMOS Jeffrey S. Brown, Robert K. Leidy, Steven H. Voldman 1999-08-17
5882967 Process for buried diode formation in CMOS Jeffrey S. Brown, Robert K. Leidy, Steven H. Voldman 1999-03-16
5861330 Method and structure to reduce latch-up using edge implants Faye D. Baker, Jeffrey S. Brown, Robert J. Gauthier, Jr., Robert K. Leidy, Edward J. Nowak +1 more 1999-01-19
5860211 Method of temporarily bonding two surfaces Harold G. Linde 1999-01-19
5831301 Trench storage dram cell including a step transfer device David V. Horak, Toshiharu Furukawa, Mark C. Hakey, William H. Ma, Jack A. Mandelman 1998-11-03
5793103 Insulated cube with exposed wire lead Timothy H. Daubenspeck, Thomas G. Ference 1998-08-11
5776660 Fabrication method for high-capacitance storage node structures Mark C. Hakey, David V. Horak, William H. Ma 1998-07-07
5760483 Method for improving visibility of alignment targets in semiconductor processing James A. Bruce, Robert K. Leidy 1998-06-02
5691239 Method for fabricating an electrical connect above an integrated circuit Mark C. Hakey, John M. Wursthorn 1997-11-25
5609772 Cube maskless lead open process using chemical mechanical polish/lead-tip expose process Timothy H. Daubenspeck, Thomas G. Ference 1997-03-11
5556802 Method of making corrugated vertical stack capacitor (CVSTC) Paul E. Bakeman, Jr., Bomy Chen, John Cronin, Hing Wong 1996-09-17
5532518 Electrical connect and method of fabrication for semiconductor cube technology Mark C. Hakey, John M. Wursthorn 1996-07-02
5516608 Method for controlling a line dimension arising in photolithographic processes Philip Charles Danby Hobbs, Robert Jackson, Jerry Shaw, John L. Sturtevant, Theodore G. van Kessel 1996-05-14
5185294 Boron out-diffused surface strap process Chung H. Lam, Jerome B. Lasky, Craig M. Hill, James S. Nakos, Stephen F. Geissler +1 more 1993-02-09
5173452 Process for the vapor deposition of polysilanes photoresists David M. Dobuzinsky, Mark C. Hakey, David V. Horak 1992-12-22
4808511 Vapor phase photoresist silylation process 1989-02-28