Issued Patents All Time
Showing 25 most recent of 70 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8772876 | High-voltage silicon-on-insulator transistors and methods of manufacturing the same | Jack A. Mandelman, Carl Radens, William R. Tonti | 2014-07-08 |
| 7790527 | High-voltage silicon-on-insulator transistors and methods of manufacturing the same | Jack A. Mandelman, Carl Radens, William R. Tonti | 2010-09-07 |
| 7548952 | Method of sending an email to a plurality of recipients with selective treatment of attached files | Wayne M. Delia, William Ma | 2009-06-16 |
| 7176089 | Vertical dual gate field effect transistor | Toshiharu Furukawa, Mark C. Hakey, Steven J. Holmes, David V. Horak, James M. Leas +1 more | 2007-02-13 |
| 6998332 | Method of independent P and N gate length control of FET device made by sidewall image transfer technique | Toshiharu Furukawa, Steven J. Holmes | 2006-02-14 |
| 6936879 | Increased capacitance trench capacitor | Toshiharu Furukawa, Mark C. Hakey, Steven J. Holmes | 2005-08-30 |
| 6924200 | Methods using disposable and permanent films for diffusion and implantation doping | Toshiharu Furukawa, Mark C. Hakey, Steven J. Holmes, David V. Horak, Patricia Marmillion +1 more | 2005-08-02 |
| 6915333 | Method of managing attached document | Wayne M. Delia, William Ma | 2005-07-05 |
| 6891226 | Dual gate logic device | Toshiharu Furukawa, Mark C. Hakey, Steven J. Holmes, David V. Horak | 2005-05-10 |
| 6867143 | Method for etching a semiconductor substrate using germanium hard mask | Toshiharu Furukawa, Mark C. Hakey, Steven J. Holmes, David V. Horak | 2005-03-15 |
| 6798017 | Vertical dual gate field effect transistor | Toshiharu Furukawa, Mark C. Hakey, Steven J. Holmes, David V. Horak, James M. Leas +1 more | 2004-09-28 |
| 6788316 | Method of designating multiple hypertext links to be sequentially viewed | Wayne M. Delia, William Ma | 2004-09-07 |
| 6731315 | Method for selecting display parameters of a magnifiable cursor | William Ma, Wayne M. Delia | 2004-05-04 |
| 6620675 | Increased capacitance trench capacitor | Toshiharu Furukawa, Mark C. Hakey, Steven J. Holmes | 2003-09-16 |
| 6596597 | Method of manufacturing dual gate logic devices | Toshiharu Furukawa, Mark C. Hakey, Steven J. Holmes, David V. Horak | 2003-07-22 |
| 6590258 | SIO stacked DRAM logic | Ramachandra Divakauni, Mark C. Hakey, Jack A. Mandclman, William R. Tonti | 2003-07-08 |
| 6548345 | Method of fabricating trench for SOI merged logic DRAM | Mark C. Hakey | 2003-04-15 |
| 6544837 | SOI stacked DRAM logic | Ramachandra Divakauni, Mark C. Hakey, Jack A. Mandelman, William R. Tonti | 2003-04-08 |
| 6544832 | Method of fabricating a stack capacitor DRAM | David E. Kotecki | 2003-04-08 |
| 6512266 | Method of fabricating SiO2 spacers and annealing caps | Sadanand V. Deshpande, Bruce B. Doris, Rajarao Jammy | 2003-01-28 |
| 6506660 | Semiconductor with nanoscale features | Steven J. Holmes, Charles T. Black, David J. Frank, Toshiharu Furukawa, Mark C. Hakey +3 more | 2003-01-14 |
| 6506653 | Method using disposable and permanent films for diffusion and implant doping | Toshiharu Furukawa, Mark C. Hakey, Steven J. Holmes, David V. Horak, Patricia Marmillion +1 more | 2003-01-14 |
| 6500054 | Chemical-mechanical polishing pad conditioner | Adam D. Ticknor | 2002-12-31 |
| 6462752 | Automatic scrolling function for editors and browsers | Wayne M. Delia, William Ma | 2002-10-08 |
| 6451634 | Method of fabricating a multistack 3-dimensional high density semiconductor device | Dominic J. Schepis | 2002-09-17 |