Issued Patents All Time
Showing 26–50 of 70 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6444402 | Method of making differently sized vias and lines on the same lithography level | Toshiharu Furukawa, Mark C. Hakey, Steven J. Holmes, David V. Horak | 2002-09-03 |
| 6420748 | Borderless bitline and wordline DRAM structure | Mark C. Hakey, David V. Horak, Wendell P. Noble | 2002-07-16 |
| 6391426 | High capacitance storage node structures | Mark C. Hakey, Steven J. Holmes, David V. Horak | 2002-05-21 |
| 6358813 | Method for increasing the capacitance of a semiconductor capacitors | Steven J. Holmes, Charles T. Black, David J. Frank, Toshiharu Furukawa, Mark C. Hakey +3 more | 2002-03-19 |
| 6342323 | Alignment methodology for lithography | David V. Horak, Toshiharu Furukawa, Steven J. Holmes, Mark C. Hakey | 2002-01-29 |
| 6333245 | Method for introducing dopants into semiconductor devices using a germanium oxide sacrificial layer | Toshiharu Furukawa, Mark C. Hakey, Steven J. Holmes, David V. Horak, Donald W. Rakowski | 2001-12-25 |
| 6319759 | Method for making oxide | Toshiharu Furukawa, Mark C. Hakey, Steven J. Holmes, David V. Horak | 2001-11-20 |
| 6291858 | Multistack 3-dimensional high density semiconductor device and method for fabrication | Dominic J. Schepis | 2001-09-18 |
| 6281576 | Method of fabricating structure for chip micro-joining | Mark C. Hakey | 2001-08-28 |
| 6271599 | Wire interconnect structure for electrically and mechanically connecting an integrated circuit chip to a substrate | Birendra Agarwala | 2001-08-07 |
| 6268259 | Overhanging separator for self-defining stacked capacitor | David E. Kotecki | 2001-07-31 |
| 6262450 | DRAM stack capacitor with vias and conductive connection extending from above conductive lines to the substrate | David E. Kotecki | 2001-07-17 |
| 6261933 | Process for building borderless bitline, wordline amd DRAM structure | Mark C. Hakey, David V. Horak, Wendell P. Noble | 2001-07-17 |
| 6232170 | Method of fabricating trench for SOI merged logic DRAM | Mark C. Hakey | 2001-05-15 |
| 6228705 | Overlay process for fabricating a semiconductor device | Toshiharu Furukawa, Mark C. Hakey, Steven J. Holmes, David V. Horak | 2001-05-08 |
| 6225158 | Trench storage dynamic random access memory cell with vertical transfer device | Toshiharu Furukawa, Mark C. Hakey, David V. Horak, Jack A. Mandelman | 2001-05-01 |
| 6221562 | Resist image reversal by means of spun-on-glass | Diane C. Boyd, Toshiharu Furukawa, Steven J. Holmes, Paul A. Rabidoux, David V. Horak | 2001-04-24 |
| 6207540 | Method for manufacturing high performance MOSFET device with raised source and drain | Toshiharu Furukawa, Mark C. Hakey, Steven J. Holmes, David V. Horak, Jack A. Mandelman | 2001-03-27 |
| 6191469 | Overhanging separator for self-defining discontinuous film | David E. Kotecki | 2001-02-20 |
| 6190988 | Method for a controlled bottle trench for a dram storage node | Toshiharu Furukawa, Mark C. Hakey, Steven J. Holmes, David V. Horak, James M. Never | 2001-02-20 |
| 6184549 | Trench storage dynamic random access memory cell with vertical transfer device | Toshiharu Furukawa, Mark C. Hakey, David V. Horak, Jack A. Mandelman | 2001-02-06 |
| 6184151 | Method for forming cornered images on a substrate and photomask formed thereby | William J. Adair, Richard A. Ferguson, Mark C. Hakey, Steven J. Holmes, David V. Horak +3 more | 2001-02-06 |
| 6175128 | Process for building borderless bitline, wordline and DRAM structure and resulting structure | Mark C. Hakey, David V. Horak, Wendell P. Noble | 2001-01-16 |
| 6153491 | Overhanging separator for self-defining discontinuous film | David E. Kotecki | 2000-11-28 |
| 6150230 | Trench separator for self-defining discontinuous film | David E. Kotecki | 2000-11-21 |