Issued Patents All Time
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9488776 | Method for fabricating silicon photonic waveguides | Andrew T. S. Pomerene | 2016-11-08 |
| 9305779 | Method for growing germanium epitaxial films | Daniel N. Carothers, Andrew T. S. Pomerene, Vu A. Vu | 2016-04-05 |
| 8871554 | Method for fabricating butt-coupled electro-absorptive modulators | Andrew T. S. Pomerene | 2014-10-28 |
| 8666206 | Asymmetric slotted waveguide and method for fabricating the same | Andrew T. S. Pomerene, Wesley D. Reinhardt | 2014-03-04 |
| 8513037 | Method of integrating slotted waveguide into CMOS process | Andrew T. S. Pomerene, Timothy J. Conway, Stewart L. Ocheltree | 2013-08-20 |
| 8343792 | Method for manufacturing lateral germanium detectors | Daniel N. Carothers, Andrew T. S. Pomerene, Vu A. Vu, Robert L. Kamocsai, Timothy J. Conway | 2013-01-01 |
| 8192638 | Method for manufacturing multiple layers of waveguides | Andrew T. S. Pomerene, Timothy J. Conway, Mark A. Jaso | 2012-06-05 |
| 8148265 | Two-step hardmask fabrication methodology for silicon waveguides | Daniel N. Carothers, Andrew T. S. Pomerene | 2012-04-03 |
| 7974505 | Method for fabricating selectively coupled optical waveguides on a substrate | Mark A. Jaso | 2011-07-05 |
| 7927979 | Multi-thickness semiconductor with fully depleted devices and photonic integration | Andrew T. S. Pomerene, Daniel N. Carothers, Timothy J. Conway, Vu A. Vu | 2011-04-19 |
| 7847353 | Multi-thickness semiconductor with fully depleted devices and photonic integration | Andrew T. S. Pomerene, Daniel N. Carothers, Timothy J. Conway, Vu A. Vu | 2010-12-07 |
| 7811844 | Method for fabricating electronic and photonic devices on a semiconductor substrate | Daniel N. Carothers, Andrew T. S. Pomerene, Timothy J. Conway, Rick Thompson, Vu A. Vu +3 more | 2010-10-12 |
| 7736934 | Method for manufacturing vertical germanium detectors | Daniel N. Carothers, Andrew T. S. Pomerene, Vu A. Vu, Joe Giunta, Jonathan N. Ishii | 2010-06-15 |
| 5268330 | Process for improving sheet resistance of an integrated circuit device gate | John H. Givens, James S. Nakos, Peter A. Burke, Chung H. Lam | 1993-12-07 |
| 5185294 | Boron out-diffused surface strap process | Chung H. Lam, Jerome B. Lasky, James S. Nakos, Steven J. Holmes, Stephen F. Geissler +1 more | 1993-02-09 |