Issued Patents All Time
Showing 26–50 of 183 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7962811 | Scan chain disable function for power saving | Joel A. Silberman, Osamu Takahashi, James D. Warnock, Dieter Wendel | 2011-06-14 |
| 7917347 | Generating a worst case current waveform for testing of integrated circuit devices | Makoto Aikawa, Jonathan James DeMent, Brian Flachs, Gilles Gervais, Iwao Takiguchi +1 more | 2011-03-29 |
| 7746140 | Scannable latch | Joel A. Silberman, Osamu Takahashi | 2010-06-29 |
| 7739573 | Voltage identifier sorting | Jonathan James DeMent, Gilles Gervais, Alain Loiseau, Kirk D. Peterson, John L. Sinchak | 2010-06-15 |
| 7724567 | Memory device and method of refreshing | Jin Cho, John Wuu, Gurupada Mandal | 2010-05-25 |
| 7716516 | Method for controlling operation of microprocessor which performs duty cycle correction process | Yosuke Muraki, Tetsuji Tamura, Iwao Takiguchi, Makoto Aikawa, Eskinder Hailu +8 more | 2010-05-11 |
| 7710796 | Level shifter for boosting wordline voltage and memory cell performance | Scott Raymond Cottier, Rajiv V. Joshi, Juergen Pille, Osamu Takahashi | 2010-05-04 |
| 7617338 | Memory with combined line and word access | Brian Flachs, Harm Peter Hofstee, Osamu Takahashi | 2009-11-10 |
| 7610531 | Modifying a test pattern to control power supply noise | Brian Flachs, Gilles Gervais, Brad W. Michael, Mack W. Riley | 2009-10-27 |
| 7493357 | Random carry-in for floating-point operations | Harm Peter Hofstee, Kevin John Nowka, Steven Douglas Posluszny, Joel A. Silberman | 2009-02-17 |
| 7490119 | High speed adder design for a multiply-add based floating point unit | Silvia M. Mueller, Hwa-Joon Oh | 2009-02-10 |
| 7486096 | Method and apparatus for testing to determine minimum operating voltages in electronic devices | Brian Flachs, Gilles Gervais, Charles Ray Johns, Brad W. Michael, Makoto Aikawa +2 more | 2009-02-03 |
| 7469265 | Methods and apparatus for performing multi-value range checks | Silvia M. Mueller, Hiroo Nishikawa, Hwa-Joon Oh | 2008-12-23 |
| 7447602 | System and method for sorting processors based on thermal design point | Douglas H. Bradley, Jonathan James DeMent, Brian Flachs, Gilles Gervais, Yoichi Nishino | 2008-11-04 |
| 7447725 | Apparatus for controlling rounding modes in single instruction multiple data (SIMD) floating-point units | Harm Peter Hofstee, Christian Jacobi, Silvia M. Mueller, Hwa-Joon Oh | 2008-11-04 |
| 7444525 | Methods and apparatus for reducing leakage current in a disabled SOI circuit | Hiroshi Yoshihara, Osamu Takahashi, Takaaki Nakazato | 2008-10-28 |
| 7423921 | Method and apparatus for wordline redundancy control of memory in an information handling system | Toru Asano, Takaaki Nakazato, Osamu Takahashi | 2008-09-09 |
| 7406589 | Processor having efficient function estimate instructions | Gordon Clyde Fossum, Harm Peter Hofstee, Brad W. Michael, Silvia M. Mueller, Hwa-Joon Oh | 2008-07-29 |
| 7392270 | Apparatus and method for reducing the latency of sum-addressed shifters | Christian Jacobi, Silvia M. Mueller, Hiroo Nishikawa, Hwa-Joon Oh | 2008-06-24 |
| 7363609 | Method of logic circuit synthesis and design using a dynamic circuit library | Harm Peter Hofstee, Stephen Douglas Posluszny, Joel A. Silberman, Osamu Takahashi, Dieter Wendel | 2008-04-22 |
| 7318182 | Memory array manufacturing defect detection system and method | Louis Bernard Bushard, Brian Flachs, Osamu Takahashi, Michael Brian White | 2008-01-08 |
| 7290023 | High performance implementation of exponent adjustment in a floating point design | Silvia M. Mueller, Hwa-Joon Oh, Kevin D. Tran | 2007-10-30 |
| 7245159 | Protecting one-hot logic against short-circuits during power-on | Christian Jacobi, Hwa-Joon Oh, Silvia M. Mueller | 2007-07-17 |
| 7237163 | Leakage current reduction system and method | Hwa-Joon Oh, Silvia M. Mueller, Joel A. Silberman | 2007-06-26 |
| 7225422 | Wire trimmed programmable logic array | Robert J. Bucki, Joel A. Silberman, Osamu Takahashi | 2007-05-29 |