Issued Patents All Time
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10734075 | Semiconductor storage device and method of reading data therefrom | Yuki INUZUKA | 2020-08-04 |
| 10672473 | Semiconductor memory device | Atsushi Kawasumi | 2020-06-02 |
| 9318189 | Sense amplifier circuit | — | 2016-04-19 |
| 7719880 | Method and system for semiconductor memory | — | 2010-05-18 |
| 7444525 | Methods and apparatus for reducing leakage current in a disabled SOI circuit | Hiroshi Yoshihara, Sang Hoo Dhong, Osamu Takahashi | 2008-10-28 |
| 7423921 | Method and apparatus for wordline redundancy control of memory in an information handling system | Toru Asano, Sang Hoo Dhong, Osamu Takahashi | 2008-09-09 |
| 7139215 | Apparatus and method of word line decoding for deep pipelined memory | Toru Asano, Sang Hoo Dhong, Osamu Takahashi | 2006-11-21 |
| 7071737 | Systems and methods for controlling timing in a circuit | Atsushi Kawasumi | 2006-07-04 |
| 7053668 | SOI sense amplifier with cross-coupled body terminal | Toru Asano, Osamu Takahashi, Sang Hoo Dhong | 2006-05-30 |
| 7046045 | SOI sense amplifier with cross-coupled bit line structure | Toru Asano, Osamu Takahashi, Sang Hoo Dhong | 2006-05-16 |
| 6898135 | Latch type sense amplifier method and apparatus | Toru Asano, Sang Hoo Dhong, Osamu Takahashi | 2005-05-24 |
| 6885596 | Apparatus and method of wordline/bitline redundancy control using shift registers in an SRAM | Toru Asano, Sang Hoo Dhong, Osamu Takahashi | 2005-04-26 |
| 6850456 | Subarray control and subarray cell access in a memory module | Toru Asano, Sang Hoo Dhong, Osamu Takahashi | 2005-02-01 |
| 6833736 | Pulse generating circuit | Toru Asano, Osamu Takahashi, Sang Hoo Dhong, Atsushi Kawasumi | 2004-12-21 |
| 6567326 | Semiconductor memory device | Yukihiro Fujimoto | 2003-05-20 |