Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11862289 | Sum address memory decoded dual-read select register file | Geoffrey Wang, Michael Lee | 2024-01-02 |
| 7290023 | High performance implementation of exponent adjustment in a floating point design | Sang Hoo Dhong, Silvia M. Mueller, Hwa-Joon Oh | 2007-10-30 |
| 7149877 | Byte execution unit for carrying out byte instructions in a processor | Sang Hoo Dhong, Hwa-Joon Oh, Brad W. Michael, Silvia M. Mueller | 2006-12-12 |
| 7058830 | Power saving in a floating point unit using a multiplier and aligner bypass | Sang Hoo Dhong, Silvia M. Mueller, Hwa-Joon Oh | 2006-06-06 |