Issued Patents All Time
Showing 25 most recent of 80 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9076509 | Methods and apparatus for varying a supply voltage or reference voltage using independent control of diode voltage in asymmetrical double-gate devices | Ching-Te Chuang, Keunwoo Kim, Jente B. Kuang, Hung C. Ngo | 2015-07-07 |
| 8555119 | Test structure for characterizing multi-port static random access memory and register file arrays | Leland Chang, Jente B. Kuang, Robert K. Montoye, Hung C. Ngo | 2013-10-08 |
| 8285765 | System and method for implementing simplified arithmetic logic unit processing of value-based control dependence sequences | Lei Chen, Hung C. Ngo | 2012-10-09 |
| 8261138 | Test structure for characterizing multi-port static random access memory and register file arrays | Leland Chang, Jente B. Kuang, Robert K. Montoye, Hung C. Ngo | 2012-09-04 |
| 8010066 | Digital transmission circuit and interface providing selectable power consumption via multiple weighted driver slices | Juan-Antonio Carballo, Ivan Vo, Seung-Moon Yoo | 2011-08-30 |
| 7952422 | Methods and apparatus for varying a supply voltage or reference voltage using independent control of diode voltage in asymmetrical double-gate devices | Ching-Te Chuang, Keunwoo Kim, Jente B. Kuang, Hung C. Ngo | 2011-05-31 |
| 7882370 | Static pulsed bus circuit and method having dynamic power supply rail selection | Harmander Singh Deogun, Rahul M. Rao, Robert M. Senger | 2011-02-01 |
| 7876131 | Dual gate transistor keeper dynamic logic | Ching-Te Chuang, Keunwoo Kim, Jente B. Kuang | 2011-01-25 |
| 7864625 | Optimizing SRAM performance over extended voltage or process range using self-timed calibration of local clock generator | Gary Dale Carpenter, Jente B. Kuang, Liang Pang | 2011-01-04 |
| 7760565 | Wordline-to-bitline output timing ring oscillator circuit for evaluating storage array performance | Jente B. Kuang, Jerry Chang Jui Kao, Hung C. Ngo, Liang Pang, Jayakumaran Sivagnaname | 2010-07-20 |
| 7668037 | Storage array including a local clock buffer with programmable timing | Gary Dale Carpenter, Fadi H. Gebara, Jerry Chang Jui Kao, Jente B. Kuang, Liang Pang | 2010-02-23 |
| 7636556 | Digital transmission circuit and method providing selectable power consumption via multiple weighted driver slices | Juan-Antonio Carballo, Ivan Vo, Seung-Moon Yoo | 2009-12-22 |
| 7620510 | Pulsed ring oscillator circuit for storage cell read timing evaluation | Gary Dale Carpenter, Jente B. Kuang, Liang Pang | 2009-11-17 |
| 7564259 | Digital circuit with dynamic power and performance control via per-block selectable operating voltage | Kanak B. Agarwal, Damir A. Jamsek | 2009-07-21 |
| 7545690 | Method for evaluating memory cell performance | Jente B. Kuang, Jerry Chang Jui Kao, Hung C. Ngo | 2009-06-09 |
| 7522670 | Digital transmission circuit and method providing selectable power consumption via single-ended or differential operation | Juan-Antonio Carballo, Ivan Vo, Seung-Moon Yoo | 2009-04-21 |
| 7493357 | Random carry-in for floating-point operations | Sang Hoo Dhong, Harm Peter Hofstee, Steven Douglas Posluszny, Joel A. Silberman | 2009-02-17 |
| 7443195 | Method of transparently reducing power consumption of a high-speed communication link | Juan-Antonio Carballo, Jeffrey L. Burns, Gary Dale Carpenter, Ivan Vo, Seung-Moon Yoo | 2008-10-28 |
| 7409305 | Pulsed ring oscillator circuit for storage cell read timing evaluation | Gary Dale Carpenter, Jente B. Kuang, Liang Pang | 2008-08-05 |
| 7353007 | Digital transmission circuit and method providing selectable power consumption via multiple weighted drive slices | Juan-Antonio Carballo, Ivan Vo, Seung-Moon Yoo | 2008-04-01 |
| 7349271 | Cascaded test circuit with inter-bitline drive devices for evaluating memory cell performance | Jente B. Kuang, Jerry Chang Jui Kao, Hung C. Ngo | 2008-03-25 |
| 7336105 | Dual gate transistor keeper dynamic logic | Ching-Te Chuang, Keunwoo Kim, Jente B. Kuang | 2008-02-26 |
| 7298176 | Dual-gate dynamic logic circuit with pre-charge keeper | Hung C. Ngo, Ching-Te Chuang, Keunwoo Kim, Jente B. Kuang | 2007-11-20 |
| 7276932 | Power-gating cell for virtual power rail control | Jente B. Kuang, Jethro C. Law, Hung C. Ngo | 2007-10-02 |
| 7266707 | Dynamic leakage control circuit | Hung C. Ngo, Jente B. Kuang, Rajiv V. Joshi | 2007-09-04 |