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Static pulsed bus circuit and method having dynamic power supply rail selection |
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Circuit for dynamic circuit timing synthesis and monitoring of critical paths and environmental conditions of an integrated circuit |
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Dynamic logic circuit apparatus and method for reducing leakage power consumption via separate clock and output stage control |
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Dynamic logic circuit incorporating reduced leakage state-retaining devices |
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Multi-threshold complementary metal-oxide semiconductor (MTCMOS) bus circuit and method for reducing bus power consumption via pulsed standby switching |
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