RW

Ryan Wuthrich

IBM: 20 patents #5,451 of 70,183Top 8%
Overall (All Time): #225,308 of 4,157,543Top 6%
20
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
7713829 Incorporation of carbon in silicon/silicon germanium epitaxial layer to enhance yield for Si-Ge bipolar technology Jack O. Chu, Douglas D. Coolbaugh, James S. Dunn, David R. Greenberg, David L. Harame +4 more 2010-05-11
7413967 Yield improvement in silicon-germanium epitaxial growth Mark D. Dupuis, Wade J. Hodge, Daniel Kelly 2008-08-19
7173274 Incorporation of carbon in silicon/silicon germanium epitaxial layer to enhance yield for Si-Ge bipolar technology Jack O. Chu, Douglas D. Coolbaugh, James S. Dunn, David R. Greenberg, David L. Harame +4 more 2007-02-06
7118995 Yield improvement in silicon-germanium epitaxial growth Mark D. Dupuis, Wade J. Hodge, Daniel Kelly 2006-10-10
6900519 Diffused extrinsic base and method for fabrication Marc W. Cantell, James S. Dunn, David L. Harame, Robb Johnson, Louis D. Lanzerotti +2 more 2005-05-31
6881259 In-situ monitoring and control of germanium profile in silicon-germanium alloy films and temperature monitoring during deposition of silicon films David C. Ahlgren, Jack O. Chu, Basanth Jagannathan 2005-04-19
6875279 Single reactor, multi-pressure chemical vapor deposition for semiconductor devices Jack O. Chu, Basanth Jagannathan 2005-04-05
6869854 Diffused extrinsic base and method for fabrication Marc W. Cantell, James S. Dunn, David L. Harame, Robb Johnson, Louis D. Lanzerotti +2 more 2005-03-22
6858903 MOSFET device with in-situ doped, raised source and drain structures Wesley C. Natzle, Marc W. Cantell, Louis D. Lanzerotti, Effendi Leobandung, Brian L. Tessier 2005-02-22
6858532 Low defect pre-emitter and pre-base oxide etch for bipolar transistors and related tooling Wesley C. Natzle, David C. Ahlgren, Steven G. Barbee, Marc W. Cantell, Basanth Jagannathan +2 more 2005-02-22
6815802 Incorporation of carbon in silicon/silicon germanium epitaxial layer to enhance yield for Si-Ge bipolar technology Jack O. Chu, Douglass Duane Coolbaugh, James S. Dunn, David R. Greenberg, David L. Harame +4 more 2004-11-09
6780735 Method to increase carbon and boron doping concentrations in Si and SiGe films Basanth Jagannathan, Jack O. Chu, Byeongju Park 2004-08-24
6774000 Method of manufacture of MOSFET device with in-situ doped, raised source and drain structures Wesley C. Natzle, Marc W. Cantell, Louis D. Lanzerotti, Effendi Leobandung, Brian L. Tessier 2004-08-10
6744079 Optimized blocking impurity placement for SiGe HBTs Basanth Jagannathan, Alvin J. Joseph, Xuefeng Liu, Kathryn T. Schonenberg 2004-06-01
6426265 Incorporation of carbon in silicon/silicon germanium epitaxial layer to enhance yield for Si-Ge bipolar technology Jack O. Chu, Douglas D. Coolbaugh, James S. Dunn, David R. Greenberg, David L. Harame +4 more 2002-07-30
6354309 Process for treating a semiconductor substrate Russell H. Arndt, Glenn W. Gale, Frederick William Kern, Jr., Karen P. Madden, Harald Okorn-Schmidt +2 more 2002-03-12
6173720 Process for treating a semiconductor substrate Russell H. Arndt, Glenn W. Gale, Frederick William Kern, Jr., Karen P. Madden, Harald Okorn-Schmidt +2 more 2001-01-16
5948193 Process for fabricating a multilayer ceramic substrate from thin greensheet Michael A. Cohn, Jon A. Casey, Christopher N. Collins, Robert A. Rita, Robert J. Sullivan +2 more 1999-09-07
5874162 Weighted sintering process and conformable load tile Kurt E. Bastian, James J. Burte, Michael A. Cohn, Christopher N. Collins, Joseph P. DeGeorge +5 more 1999-02-23
5741131 Stacking system for substrates Joseph P. DeGeorge, Kurt E. Bastian, Michael A. Cohn, Christopher N. Collins, Italo A. DiNunzio 1998-04-21