RL

Robert K. Leidy

IBM: 97 patents #597 of 70,183Top 1%
Globalfoundries: 11 patents #330 of 4,424Top 8%
GU Globalfoundries U.S.: 2 patents #206 of 665Top 35%
📍 Burlington, VT: #6 of 475 inventorsTop 2%
🗺 Vermont: #48 of 4,968 inventorsTop 1%
Overall (All Time): #11,954 of 4,157,543Top 1%
110
Patents All Time

Issued Patents All Time

Showing 76–100 of 110 patents

Patent #TitleCo-InventorsDate
6716559 Method and system for determining overlay tolerance Timothy C. Milmore, Matthew Nicholls 2004-04-06
6620635 Damascene resistor and method for measuring the width of same 2003-09-16
6513796 Wafer chuck having a removable insert Paul D. Sonntag 2003-02-04
6420766 Transistor having raised source and drain Jeffrey S. Brown, James S. Dunn, Steven J. Holmes, David V. Horak, Steven H. Voldman 2002-07-16
6383719 Process for enhanced lithographic imaging Orest Bula, Daniel C. Cole, Edward W. Conrad, Stephen E. Knight 2002-05-07
6350548 Nested overlay measurement target Debra L. Meunier 2002-02-26
6344373 Antifuse structure and process Arup Bhattacharyya, Robert M. Geffken, Chung H. Lam 2002-02-05
6278102 Method of detecting electromagnetic radiation with bandgap engineered active pixel cell design Terence B. Hook, Jeffrey B. Johnson, Hon-Sum Philip Wong 2001-08-21
6255178 Method for forming transistors with raised source and drains and device formed thereby Jeffrey S. Brown, James S. Dunn, Steven J. Holmes, David V. Horak, Steven H. Voldman 2001-07-03
6232639 Method and structure to reduce latch-up using edge implants Faye D. Baker, Jeffrey S. Brown, Robert J. Gauthier, Jr., Steven J. Holmes, Edward J. Nowak +1 more 2001-05-15
6218704 ESD protection structure and method Jeffrey S. Brown, Steven J. Holmes, Steven H. Voldman 2001-04-17
6184151 Method for forming cornered images on a substrate and photomask formed thereby William J. Adair, Richard A. Ferguson, Mark C. Hakey, Steven J. Holmes, David V. Horak +3 more 2001-02-06
6180498 Alignment targets having enhanced contrast Robert M. Geffken 2001-01-30
6147394 Method of photolithographically defining three regions with one mask step and self aligned isolation structure formed thereby James A. Bruce, Steven J. Holmes, Walter E. Mlynko, Edward W. Sengle 2000-11-14
6100013 Method for forming transistors with raised source and drains and device formed thereby Jeffery Brown, James S. Dunn, Steven J. Holmes, David V. Horak, Steven H. Voldman 2000-08-08
6069040 Fabricating a floating gate with field enhancement feature self-aligned to a groove Glen L. Miles 2000-05-30
6033949 Method and structure to reduce latch-up using edge implants Faye D. Baker, Jeffrey S. Brown, Robert J. Gauthier, Jr., Steven J. Holmes, Edward J. Nowak +1 more 2000-03-07
6015750 Method for improving visibility of alignment target in semiconductor processing James A. Bruce, Steven J. Holmes 2000-01-18
5981148 Method for forming sidewall spacers using frequency doubling hybrid resist and device formed thereby Jeffrey S. Brown, James S. Dunn, Steven J. Holmes, Cuc K. Huynh, Paul W. Pastel 1999-11-09
5976768 Method for forming sidewall spacers using frequency doubling hybrid resist and device formed thereby Jeffrey S. Brown, James S. Dunn, Steven J. Holmes, Cuc K. Huynh, Paul W. Pastel 1999-11-02
5972570 Method of photolithographically defining three regions with one mask step and self aligned isolation structure formed thereby James A. Bruce, Steven J. Holmes, Walter E. Mlynko, Edward W. Sengle 1999-10-26
5959325 Method for forming cornered images on a substrate and photomask formed thereby William J. Adair, Richard A. Ferguson, Mark C. Hakey, Steven J. Holmes, David V. Horak +3 more 1999-09-28
5939767 Structure and process for buried diode formation in CMOS Jeffrey S. Brown, Steven J. Holmes, Steven H. Voldman 1999-08-17
5898227 Alignment targets having enhanced contrast Robert M. Geffken 1999-04-27
5882967 Process for buried diode formation in CMOS Jeffrey S. Brown, Steven J. Holmes, Steven H. Voldman 1999-03-16