Issued Patents All Time
Showing 101–118 of 118 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7928514 | Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high-k dielectrics | Nestor A. Bojarczuk, Cyril Cabral, Jr., Eduard A. Cartier, Matthew W. Copel, Evgeni Gousev +4 more | 2011-04-19 |
| 7902620 | Suspended germanium photodetector for silicon waveguide | Solomon Assefa, Jack O. Chu, William M. Green, Young-Hee Kim, George G. Totir +3 more | 2011-03-08 |
| 7868410 | Gate stack engineering by electrochemical processing utilizing through-gate-dielectric current flow | Philippe M. Vereecken, Veeraraghavan S. Basker, Cyril Cabral, Jr., Emanuel I. Cooper, Hariklia Deligianni +4 more | 2011-01-11 |
| 7858500 | Low threshold voltage semiconductor device with dual threshold voltage control means | Eduard A. Cartier, Matthew W. Copel, Evgeni Gousev, Paul C. Jamison, Rajarao Jammy +2 more | 2010-12-28 |
| 7838908 | Semiconductor device having dual metal gates and method of manufacture | Unoh Kwon, Siddarth A. Krishnan, Takashi Ando, Michael P. Chudzik, William K. Henson +5 more | 2010-11-23 |
| 7745278 | Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high K dielectrics | Nestor A. Bojarczuk, Cyril Cabral, Jr., Eduard A. Cartier, Matthew W. Copel, Evgeni Gousev +4 more | 2010-06-29 |
| 7718496 | Techniques for enabling multiple Vt devices using high-K metal gate stacks | Arvind Kumar, Vijay Narayanan, Vamsi K. Paruchuri, Jeffrey W. Sleight | 2010-05-18 |
| 7655994 | Low threshold voltage semiconductor device with dual threshold voltage control means | Eduard A. Cartier, Mathew W. Copel, Evgeni Gousev, Paul C. Jamison, Rajarao Jammy +2 more | 2010-02-02 |
| 7560361 | Method of forming gate stack for semiconductor electronic device | Alexander Reznicek, Evgeni Gousev, Eduard A. Cartier | 2009-07-14 |
| 7521346 | Method of forming HfSiN metal for n-FET applications | Alessandro C. Callegari, Rajarao Jammy, Dianne L. Lacey, Fenton R. McFeely, Sufi Zafar | 2009-04-21 |
| 7521376 | Method of forming a semiconductor structure using a non-oxygen chalcogen passivation treatment | Steven J. Koester, John A. Ott, Huiling Shang | 2009-04-21 |
| 7479683 | Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high-k dielectrics | Nestor A. Bojarczuk, Cyril Cabral, Jr., Eduard A. Cartier, Matthew W. Copel, Evgeni Gousev +4 more | 2009-01-20 |
| 7452767 | Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high k dielectrics | Nestor A. Bojarczuk, Cyril Cabral, Jr., Eduard A. Cartier, Matthew W. Copel, Evgeni Gousev +4 more | 2008-11-18 |
| 7368045 | Gate stack engineering by electrochemical processing utilizing through-gate-dielectric current flow | Philippe M. Vereecken, Veeraraghavan S. Basker, Cyril Cabral, Jr., Emanuel I. Cooper, Hariklia Deligianni +4 more | 2008-05-06 |
| 7242055 | Nitrogen-containing field effect transistor gate stack containing a threshold voltage control layer formed via deposition of a metal oxide | Nestor A. Bojarczuk, Cyril Cabral, Jr., Eduard A. Cartier, Evgeni Gousev, Supratik Guha +4 more | 2007-07-10 |
| 7223677 | Process for fabricating a semiconductor device having an insulating layer formed over a semiconductor substrate | Yves Chabal, Glen Wilk, Martin L. Green | 2007-05-29 |
| 7105889 | Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high k dielectrics | Nestor A. Bojarczuk, Cyril Cabral, Jr., Eduard A. Cartier, Matthew W. Copel, Evgeni Gousev +4 more | 2006-09-12 |
| 6825538 | Semiconductor device using an insulating layer having a seed layer | Yves Chabal, Glen Wilk | 2004-11-30 |