MH

Mark C. Hakey

IBM: 224 patents #130 of 70,183Top 1%
Globalfoundries: 1 patents #2,221 of 4,424Top 55%
📍 Colchester, VT: #1 of 432 inventorsTop 1%
🗺 Vermont: #12 of 4,968 inventorsTop 1%
Overall (All Time): #2,491 of 4,157,543Top 1%
228
Patents All Time

Issued Patents All Time

Showing 151–175 of 228 patents

Patent #TitleCo-InventorsDate
6583462 Vertical DRAM having metallic node conductor Toshiharu Furukawa, Rajarao Jammy, Thomas S. Kanarsky, Jeffrey J. Welser, David V. Horak +1 more 2003-06-24
6548345 Method of fabricating trench for SOI merged logic DRAM William H. Ma 2003-04-15
6544837 SOI stacked DRAM logic Ramachandra Divakauni, William H. Ma, Jack A. Mandelman, William R. Tonti 2003-04-08
6531724 Borderless gate structures Toshiharu Furukawa, Steven J. Holmes, David V. Horak, Paul A. Rabidoux 2003-03-11
6506660 Semiconductor with nanoscale features Steven J. Holmes, Charles T. Black, David J. Frank, Toshiharu Furukawa, David V. Horak +3 more 2003-01-14
6506653 Method using disposable and permanent films for diffusion and implant doping Toshiharu Furukawa, Steven J. Holmes, David V. Horak, William H. Ma, Patricia Marmillion +1 more 2003-01-14
6489207 Method of doping a gate and creating a very shallow source/drain extension and resulting semiconductor Toshiharu Furukawa, Steven J. Holmes, David V. Horak 2002-12-03
6452265 Multi-chip module utilizing a nonconductive material surrounding the chips that has a similar coefficient of thermal expansion Toshiharu Furukawa, Steven J. Holmes, David V. Horak, Rosemary A. Previti-Kelly, Edmund J. Sprogis 2002-09-17
6444402 Method of making differently sized vias and lines on the same lithography level Toshiharu Furukawa, Steven J. Holmes, David V. Horak, William H. Ma 2002-09-03
6441464 Gate oxide stabilization by means of germanium components in gate conductor Steven J. Holmes, Toshiharu Furukawa, David V. Horak 2002-08-27
6440801 Structure for folded architecture pillar memory cell Toshiharu Furukawa, Steven J. Holmes, David V. Horak, Howard L. Kalter, Jack A. Mandelman +2 more 2002-08-27
6429045 Structure and process for multi-chip chip attach with reduced risk of electrostatic discharge damage Toshiharu Furukawa, Steven J. Holmes, David V. Horak, H. Bernhard Pogge, Edmund J. Sprogis +1 more 2002-08-06
6426175 Fabrication of a high density long channel DRAM gate with or without a grooved gate Toshiharu Furukawa, Stevn J. Holmes, David V. Horak, Paul A. Rabidoux 2002-07-30
6420748 Borderless bitline and wordline DRAM structure David V. Horak, William H. Ma, Wendell P. Noble 2002-07-16
6391426 High capacitance storage node structures Steven J. Holmes, David V. Horak, William H. Ma 2002-05-21
6387783 Methods of T-gate fabrication using a hybrid resist Toshiharu Furukawa, Steven J. Holmes, David V. Horak, Paul A. Rabidoux 2002-05-14
6376873 Vertical DRAM cell with robust gate-to-storage node isolation Toshiharu Furukawa, Steven J. Holmes, David V. Horak, Thomas S. Kanarsky, Jeffrey J. Welser 2002-04-23
6372412 Method of producing an integrated circuit chip using frequency doubling hybrid photoresist and apparatus formed thereby Steven J. Holmes, David V. Horak, Ahmad D. Katnani, Niranjan M. Patel, Paul A. Rabidoux 2002-04-16
6358813 Method for increasing the capacitance of a semiconductor capacitors Steven J. Holmes, Charles T. Black, David J. Frank, Toshiharu Furukawa, David V. Horak +3 more 2002-03-19
6344416 Deliberate semiconductor film variation to compensate for radial processing differences, determine optimal device characteristics, or produce small productions Toshiharu Furukawa, Steven J. Holmes, David V. Horak 2002-02-05
6342323 Alignment methodology for lithography William H. Ma, David V. Horak, Toshiharu Furukawa, Steven J. Holmes 2002-01-29
6338934 Hybrid resist based on photo acid/photo base blending Kuang-Jung Chen, Steven J. Holmes, Wu-Song Huang, Paul A. Rabidoux 2002-01-15
6333245 Method for introducing dopants into semiconductor devices using a germanium oxide sacrificial layer Toshiharu Furukawa, Steven J. Holmes, David V. Horak, William H. Ma, Donald W. Rakowski 2001-12-25
6333533 Trench storage DRAM cell with vertical three-sided transfer device Toshiharu Furukawa, Steven J. Holmes, David V. Horak, Thomas S. Kanarsky, Jack A. Mandelman 2001-12-25
6333229 Method for manufacturing a field effect transitor (FET) having mis-aligned-gate structure Toshiharu Furukawa, Steven J. Holmes, David V. Horak 2001-12-25