Issued Patents All Time
Showing 226–250 of 471 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6794721 | Integration system via metal oxide conversion | Lawrence A. Clevenger, Carl Radens, Joseph F. Shepard, Jr. | 2004-09-21 |
| 6794226 | Semiconductor device incorporating elements formed of refractory metal-silicon-nitrogen and method for fabrication | Cyril Cabral, Jr., Lawrence A. Clevenger, Keith Kwong Hon Wong | 2004-09-21 |
| 6787836 | Integrated metal-insulator-metal capacitor and metal gate transistor | Lawrence A. Clevenger, Kwong Hon Wong | 2004-09-07 |
| 6781185 | Semiconductor high dielectric constant decoupling capacitor structures and process for fabrication | Howard H. Chen, Li-Kong Wang | 2004-08-24 |
| 6778447 | Embedded DRAM system having wide data bandwidth and data transfer data protocol | Rajiv V. Joshi, Jeremy K. Stephens, Daniel W. Storaska | 2004-08-17 |
| 6777761 | Semiconductor chip using both polysilicon and metal gate devices | Lawrence A. Clevenger, Kwong Hon Wong | 2004-08-17 |
| 6777286 | Compact SRAM cell incorporating refractory metal-silicon-nitrogen resistive elements and method for fabricating | Lawrence A. Clevenger, Li-Kong Wang | 2004-08-17 |
| 6775736 | Embedded DRAM system having wide data bandwidth and data transfer data protocol | Rajiv J. Joshi, Jeremy K. Stephens, Daniel W. Storaska | 2004-08-10 |
| 6768063 | Structure and method for shadow mask electrode | Lawrence A. Clevenger, Carl Radens, Li-Kong Wang, Kwong Hon Wong | 2004-07-27 |
| 6751151 | Ultra high-speed DDP-SRAM cache | Toshiaki Kirihata, Li-Kong Wang, Robert C. Wong | 2004-06-15 |
| 6751152 | Method and configuration to allow a lower wordline boosted voltage operation while increasing a sensing signal with access transistor threshold voltage | Toshiaki Kirihata, Daniel W. Storaska | 2004-06-15 |
| 6751156 | Semiconductor memory system having dynamically delayed timing for high-speed data transfers | Rajiv V. Joshi | 2004-06-15 |
| 6743670 | High dielectric constant materials forming components of DRAM such as deep-trench capacitors and gate dielectric (insulators) for support circuits | Lawrence A. Clevenger, Carl Radens, Joseph F. Shepard, Jr. | 2004-06-01 |
| 6737907 | Programmable DC voltage generator system | Li-Kong Wang, John A. Fifield, Wayne F. Ellis | 2004-05-18 |
| 6728916 | Hierarchical built-in self-test for system-on-chip design | Howard H. Chen, Li-Kong Wang | 2004-04-27 |
| 6724029 | Twin-cell flash memory structure and method | Chung H. Lam, Jack A. Mandelman, Carl Radens, William R. Tonti | 2004-04-20 |
| 6720602 | Dynamic random access memory (DRAM) cell with folded bitline vertical transistor and method of producing the same | Lawrence A. Clevenger, Jack A. Mandelman, Carl Radens | 2004-04-13 |
| 6720595 | Three-dimensional island pixel photo-sensor | Lawrence A. Clevenger, Carl Radens, Li-Kong Wang, Kwong Hon Wong | 2004-04-13 |
| 6714476 | Memory array with dual wordline operation | Rajiv V. Joshi, Fariborz Assaderaghi | 2004-03-30 |
| 6713791 | T-RAM array having a planar cell structure and method for fabricating the same | Rajiv V. Joshi, Fariborz Assaderaghi, Dan Moy, Werner Rausch, James A. Culp | 2004-03-30 |
| 6707097 | Method for forming refractory metal-silicon-nitrogen capacitors and structures formed | Cyril Cabral, Jr., Lawrence A. Clevenger, Keith Kwong Hon Wong | 2004-03-16 |
| 6700203 | Semiconductor structure having in-situ formed unit resistors | Cyril Cabral, Jr., Lawrence A. Clevenger, Keith Kwong Hon Wong | 2004-03-02 |
| 6700161 | Variable resistor structure and method for forming and programming a variable resistor for electronic circuits | Chandrasekhar Narayan, Carl Radens | 2004-03-02 |
| 6697909 | Method and apparatus for performing data access and refresh operations in different sub-arrays of a DRAM cache memory | Li-Kong Wang | 2004-02-24 |
| 6696759 | Semiconductor device with diamond-like carbon layer as a polish-stop layer | Lawrence A. Clevenger, Jeremy K. Stephens, Michael Wise | 2004-02-24 |