JF

Julien Frougier

IBM: 146 patents #302 of 70,183Top 1%
Globalfoundries: 42 patents #54 of 4,424Top 2%
GU Globalfoundries U.S.: 17 patents #32 of 665Top 5%
TE Tessera: 2 patents #162 of 271Top 60%
AS Adeia Semiconductor Solutions: 1 patents #22 of 57Top 40%
📍 Albany, NY: #1 of 790 inventorsTop 1%
🗺 New York: #134 of 115,490 inventorsTop 1%
Overall (All Time): #3,041 of 4,157,543Top 1%
209
Patents All Time

Issued Patents All Time

Showing 201–209 of 209 patents

Patent #TitleCo-InventorsDate
10236218 Methods, apparatus and system for forming wrap-around contact with dual silicide Ruilong Xie, Hiroaki Niimi, Nigel G. Cave, Xusheng Wu 2019-03-19
10236379 Vertical FET with self-aligned source/drain regions and gate length based on channel epitaxial growth process Steven Bentley, Puneet Harischandra Suvarna, Bartlomiej Jan Pawlak 2019-03-19
10236292 Complementary FETs with wrap around contacts and methods of forming same Ruilong Xie, Puneet Harischandra Suvarna, Hiroaki Niimi, Steven Bentley, Ali Razavieh 2019-03-19
10192867 Complementary FETs with wrap around contacts and method of forming same Ruilong Xie, Puneet Harischandra Suvarna, Hiroaki Niimi, Steven Bentley, Ali Razavieh 2019-01-29
10170520 Negative-capacitance steep-switch field effect transistor with integrated bi-stable resistive system Nicolas Loubet, Ruilong Xie, Daniel Chanemougame, Ali Razavieh, Kangguo Cheng 2019-01-01
10164041 Method of forming gate-all-around (GAA) FinFET and GAA FinFET formed thereby Ruilong Xie, Andreas Knorr, Hui Zang, Min-hwa Chi 2018-12-25
10014390 Inner spacer formation for nanosheet field-effect transistors with tall suspensions Guillaume Bouche, Ruilong Xie 2018-07-03
9991352 Methods of forming a nano-sheet transistor device with a thicker gate stack and the resulting device Ali Razavieh, Ruilong Xie, Steven Bentley 2018-06-05
9947804 Methods of forming nanosheet transistor with dielectric isolation of source-drain regions and related structure Min Gyu Sung, Ruilong Xie, Chanro Park, Steven Bentley 2018-04-17