JB

Jochen Beintner

IBM: 45 patents #1,982 of 70,183Top 3%
Infineon Technologies Ag: 25 patents #563 of 7,486Top 8%
SA Siemens Aktiengesellschaft: 5 patents #2,766 of 22,248Top 15%
Robert Bosch Gmbh: 4 patents #4,370 of 19,740Top 25%
KT Kabushiki Kaisha Toshiba: 1 patents #13,537 of 21,451Top 65%
QA Qimonda Ag: 1 patents #252 of 575Top 45%
📍 Wappingers Falls, NY: #22 of 884 inventorsTop 3%
🗺 New York: #1,127 of 115,490 inventorsTop 1%
Overall (All Time): #31,130 of 4,157,543Top 1%
68
Patents All Time

Issued Patents All Time

Showing 51–68 of 68 patents

Patent #TitleCo-InventorsDate
6566228 Trench isolation processes using polysilicon-assisted fill Rama Divakaruni, Jack A. Mandelman, Andreas Knorr 2003-05-20
6548344 Spacer formation process using oxide shield Stephan Kudelka, Thomas W. Dyer 2003-04-15
6534369 Field effect transistor and method of fabrication Peter Thwaite 2003-03-18
6429092 Collar formation by selective oxide deposition Alexander Michaelis, Ulrike Gruening, Oswald Spindler, Zvonimir Gabric 2002-08-06
6369419 Self-aligned near surface strap for high density trench DRAMS Ramachandra Divakaruni, Jack A. Mandelman, Ulrike Gruening, Johann Alsmeier, Gary B. Bronner 2002-04-09
6352893 Low temperature self-aligned collar formation Alexander Michaelis, Stephan Kudelka, Oliver Genz 2002-03-05
6348394 Method and device for array threshold voltage control by trapped charge in trench isolation Jack A. Mandelman, Rama Divakaruni, Herbert L. Ho, Giuseppe La Rosa, Yujun Li +1 more 2002-02-19
6329271 Self-aligned channel implantation Hiroyuki Akatsu, Yujun Li 2001-12-11
6323103 Method for fabricating transistors Rajesh Rengarajan, Ulrike Gruening, Hans-Oliver Joachim 2001-11-27
6297530 Self aligned channel implantation Hiroyuki Akatsu, Yujun Li 2001-10-02
6265742 Memory cell structure and fabrication Ulrike Gruening, Hans-Oliver Joachim 2001-07-24
6204140 Dynamic random access memory Ulrike Gruening, Scott D. Halle, Jack A. Mandelman, Carl Radens, Juergen Wittmann +1 more 2001-03-20
6184091 Formation of controlled trench top isolation layers for vertical transistors Ulrike Gruening, Dirk Tobben, Gill Yong Lee, Oswald Spindler, Zvonimir Gabric 2001-02-06
6177698 Formation of controlled trench top isolation layers for vertical transistors Ulrike Gruening, Dirk Tobben, Gill Yong Lee, Oswald Spindler, Zvonimir Gabric 2001-01-23
6143599 Method for manufacturing memory cell with trench capacitor Byeong Y. Kim, Carl Radens 2000-11-07
6093614 Memory cell structure and fabrication Ulrike Gruening, Hans-Oliver Joachim 2000-07-25
6074903 Method for forming electrical isolation for semiconductor devices Rajesh Rengarajan, Hirofumi Inoue, Radhika Srinivasan 2000-06-13
6013937 Buffer layer for improving control of layer thickness Ulrike Gruening, Carl Radens 2000-01-11