Issued Patents All Time
Showing 151–175 of 196 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8242549 | Dynamic random access memory cell including an asymmetric transistor and a columnar capacitor | Roger A. Booth, Jr., Kangguo Cheng, Chengwen Pei | 2012-08-14 |
| 8236632 | FET structures with trench implantation to improve back channel leakage and body resistance | David M. Fried, Jeffrey B. Johnson, Kevin McStay, Paul C. Parries, Chengwen Pei +2 more | 2012-08-07 |
| 8232162 | Forming implanted plates for high aspect ratio trenches using staged sacrificial layer removal | Roger A. Booth, Jr., Kangguo Cheng, Joseph Ervin, Chengwen Pei, Ravi M. Todi +1 more | 2012-07-31 |
| 8227310 | Integrated circuits comprising an active transistor electrically connected to a trench capacitor by an overlying contact and methods of making | John E. Barth, Jr., Kangguo Cheng, Michael A. Sperling | 2012-07-24 |
| 8222154 | Fin and finFET formation by angled ion implantation | Bruce B. Doris, Kangguo Cheng | 2012-07-17 |
| 8222104 | Three dimensional integrated deep trench decoupling capacitors | Roger A. Booth, Jr., Kangguo Cheng, Ravi M. Todi | 2012-07-17 |
| 8188528 | Structure and method to form EDRAM on SOI substrate | Chengwen Pei, Kangguo Cheng, Herbert L. Ho, Subramanian S. Iyer, Byeong Y. Kim +1 more | 2012-05-29 |
| 8168507 | Structure and method of forming enhanced array device isolation for implanted plate EDRAM | Herbert L. Ho, Naoyoshi Kusaba, Karen A. Nummy, Carl Radens, Ravi M. Todi | 2012-05-01 |
| 8133781 | Method of forming a buried plate by ion implantation | Joseph Ervin | 2012-03-13 |
| 8129797 | Work function engineering for eDRAM MOSFETs | Xiangdong Chen, Herbert L. Ho | 2012-03-06 |
| 7923815 | DRAM having deep trench capacitors with lightly doped buried plates | Kangguo Cheng, Johnathan E. Faltermeier, Paul C. Parries | 2011-04-12 |
| 7863646 | Dual oxide stress liner | Michael P. Belyansky, Xiangdong Chen, Thomas W. Dyer, Haining Yang | 2011-01-04 |
| 7790530 | Dual port gain cell with side and top gated read transistor | Jack A. Mandelman, Kangguo Cheng, Ramachandra Divakaruni, Carl Radens | 2010-09-07 |
| 7791124 | SOI deep trench capacitor employing a non-conformal inner spacer | Kangguo Cheng, Herbert L. Ho, Paul C. Parries | 2010-09-07 |
| 7785959 | Method of multi-port memory fabrication with parallel connected trench capacitors in a cell | Kangguo Cheng, Ramachandra Divakaruni, Jack A. Mandelman, Carl Radens | 2010-08-31 |
| 7776706 | Forming SOI trench memory with single-sided buried strap | Kangguo Cheng, Ramachandra Divakaruni, Herbert L. Ho | 2010-08-17 |
| 7732872 | Integration scheme for multiple metal gate work function structures | Kangguo Cheng, Michael P. Chudzik, Ramachandra Divakaruni, Robert C. Wong, Haining Yang | 2010-06-08 |
| 7723201 | Structure and method for making on-chip capacitors with various capacitances | Kangguo Cheng | 2010-05-25 |
| 7668003 | Dynamic random access memory circuit, design structure and method | John E. Barth, Jr., Kangguo Cheng, Hoki Kim | 2010-02-23 |
| 7596038 | Floating body control in SOI DRAM | Hoki Kim | 2009-09-29 |
| 7550359 | Methods involving silicon-on-insulator trench memory with implanted plate | Kangguo Cheng, Herbert L. Ho | 2009-06-23 |
| 7485525 | Method of manufacturing a multiple port memory having a plurality of parallel connected trench capacitors in a cell | Kangguo Cheng, Ramachandra Divakaruni, Jack A. Mandelman, Carl Radens | 2009-02-03 |
| 7459743 | Dual port gain cell with side and top gated read transistor | Jack A. Mandelman, Kangguo Cheng, Ramachandra Divakaruni, Carl Radens | 2008-12-02 |
| 7445987 | Offset vertical device | Kangguo Cheng, Ramachandra Divakaruni | 2008-11-04 |
| 7445988 | Trench memory | Kangguo Cheng | 2008-11-04 |