DS

Devendra K. Sadana

IBM: 797 patents #8 of 70,183Top 1%
Globalfoundries: 22 patents #130 of 4,424Top 3%
KT King Abdulaziz City For Science And Technology: 14 patents #6 of 573Top 2%
BC Bay Zu Precision Co.: 7 patents #1 of 12Top 9%
EC Egypt Nanotechnology Center: 3 patents #12 of 29Top 45%
MT Matheson Tri-Gas: 3 patents #10 of 47Top 25%
HL Hefechip Corporation Limited: 2 patents #10 of 16Top 65%
GU George Washington University: 2 patents #62 of 325Top 20%
NV NVIDIA: 1 patents #4,316 of 7,811Top 60%
ET Elpis Technologies: 1 patents #31 of 121Top 30%
IM International Machines: 1 patents #1 of 34Top 3%
MIT: 1 patents #4,386 of 9,367Top 50%
TC Toshiba America Electronic Components: 1 patents #23 of 77Top 30%
UE US Dept of Energy: 1 patents #1,355 of 5,099Top 30%
📍 Pleasantville, NY: #1 of 229 inventorsTop 1%
🗺 New York: #7 of 115,490 inventorsTop 1%
Overall (All Time): #99 of 4,157,543Top 1%
826
Patents All Time

Issued Patents All Time

Showing 801–825 of 826 patents

Patent #TitleCo-InventorsDate
6541356 Ultimate SIMOX Keith E. Fogel, Maurice Heathcote Norcott 2003-04-01
6495429 Controlling internal thermal oxidation and eliminating deep divots in SIMOX by chlorine-based annealing Michael E. Adamcek, Anthony G. Domenicucci, Stephen Fox, Neena Garg, Kenneth J. Giewont +2 more 2002-12-17
6486037 Control of buried oxide quality in low dose SIMOX Maurice Heathcote Norcott 2002-11-26
6432754 Double SOI device with recess etch and epitaxy Fariborz Assaderaghi, Tze-Chiang Chen, K. Paul Muller, Edward J. Nowak, Ghavam G. Shahidi 2002-08-13
6429488 Densely patterned silicon-on-insulator (SOI) region on a wafer Effendi Leobandung, Dominic J. Schepis, Ghavam G. Shahidi 2002-08-06
6426252 Silicon-on-insulator vertical array DRAM cell with self-aligned buried strap Carl Radens, Gary B. Bronner, Tze-Chiang Chen, Bijan Davari, Jack A. Mandelman +3 more 2002-07-30
6404014 Planar and densely patterned silicon-on-insulator structure Effendi Leobandung, Dominic J. Schepis, Ghavam G. Shahidi 2002-06-11
6333532 Patterned SOI regions in semiconductor chips Bijan Davari, Ghavam G. Shahidi, Sandip Tiwari 2001-12-25
6300218 Method for patterning a buried oxide thickness for a separation by implanted oxygen (simox) process Guy M. Cohen 2001-10-09
6259137 Defect induced buried oxide (DIBOX) for throughput SOI Joel P. de Souza 2001-07-10
6255145 Process for manufacturing patterned silicon-on-insulator layers with self-aligned trenches and resulting product Atul Ajmera, Dominic J. Schepis 2001-07-03
6222253 Buried oxide layer in silicon Orin W. Holland 2001-04-24
6214694 Process of making densely patterned silicon-on-insulator (SOI) region on a wafer Effendi Leobandung, Dominic J. Schepis, Ghavam G. Shahidi 2001-04-10
6204546 Silicon-on-insulator substrates using low dose implantation Peter Roitman 2001-03-20
6180486 Process of fabricating planar and densely patterned silicon-on-insulator structure Effendi Leobandung, Dominic J. Schepis, Ghavam G. Shahidi 2001-01-30
6177289 Lateral trench optical detectors John D. Crow, Steve Koester, Daniel M. Kuchta, Dennis L. Rogers, Sandip Tiwari 2001-01-23
6090689 Method of forming buried oxide layers in silicon Orin W. Holland 2000-07-18
6087242 Method to improve commercial bonded SOI material Humphrey J. Maris 2000-07-11
6043166 Silicon-on-insulator substrates using low dose implantation Peter Roitman 2000-03-28
5930643 Defect induced buried oxide (DIBOX) for throughput SOI Joel P. de Souza 1999-07-27
5767549 SOI CMOS structure Wei Chen, Yuan Taur 1998-06-16
5272373 Internal gettering of oxygen in III-V compound semiconductors Harve Baratte, Joel P. de Souza 1993-12-21
5242859 Highly doped semiconductor material and method of fabrication thereof Joseph F. Degelormo, Paul Fahey, Thomas N. Jackson, Craig Ransom 1993-09-07
5188978 Controlled silicon doping of III-V compounds by thermal oxidation of silicon capping layer Joel P. Desouza, James H. Greiner 1993-02-23
5183767 Method for internal gettering of oxygen in III-V compound semiconductors Herve Baratte, Joel P. de Souza 1993-02-02