CM

Conal E. Murray

IBM: 82 patents #813 of 70,183Top 2%
Globalfoundries: 3 patents #1,029 of 4,424Top 25%
TE Tessera: 3 patents #129 of 271Top 50%
📍 Yorktown Heights, NY: #30 of 858 inventorsTop 4%
🗺 New York: #724 of 115,490 inventorsTop 1%
Overall (All Time): #18,773 of 4,157,543Top 1%
88
Patents All Time

Issued Patents All Time

Showing 26–50 of 88 patents

Patent #TitleCo-InventorsDate
9870960 Capacitance monitoring using X-ray diffraction Donghun Kang, Kriteshwar K. Kohli, Oh-Jung Kwon, Anita Madan 2018-01-16
9859157 Method for forming improved liner layer and semiconductor device including the same Chih-Chao Yang 2018-01-02
9859160 Semiconductor device with reduced via resistance Chih-Chao Yang 2018-01-02
9748173 Hybrid interconnects and method of forming the same Chih-Chao Yang 2017-08-29
9748169 Treating copper interconnects Chih-Chao Yang 2017-08-29
9735051 Semiconductor device interconnect structures formed by metal reflow process Chih-Chao Yang 2017-08-15
9476927 Structure and method to determine through silicon via build integrity Troy L. Graves-Abe, Chandrasekharan Kothandaraman 2016-10-25
9443776 Method and structure for determining thermal cycle reliability Ronald G. Filippi, Jason P. Gill, Vincent J. McGahay, Paul S. McLaughlin, Hazara S. Rathore +2 more 2016-09-13
9431354 Activating reactions in integrated circuits through electrical discharge Cyril Cabral, Jr., Gregory M. Fritz, Kenneth P. Rodbell 2016-08-30
9349691 Semiconductor device with reduced via resistance Chih-Chao Yang 2016-05-24
9287186 Method and structure for determining thermal cycle reliability Ronald G. Filippi, Jason P. Gill, Vincent J. McGahay, Paul S. McLaughlin, Hazara S. Rathore +2 more 2016-03-15
9058887 Reprogrammable electrical fuse Louis C. Hsu, Chandrasekhar Narayan, Chih-Chao Yang 2015-06-16
8802563 Surface repair structure and process for interconnect applications Chih-Chao Yang 2014-08-12
8772161 Annealing copper interconnects Cyril Cabral, Jr., Gregory M. Fritz, Christian Lavoie, Kenneth P. Rodbell 2014-07-08
8716037 Measurement of CMOS device channel strain by X-ray diffraction Thomas N. Adam, Stephen W. Bedell, Eric C. Harley, Judson R. Holt, Anita Madan +1 more 2014-05-06
8716695 Compressive (PFET) and tensile (NFET) channel strain in nanowire FETs fabricated with a replacement gate process Guy M. Cohen, Michael A. Guillorn 2014-05-06
8624395 Redundancy design with electro-migration immunity and method of manufacture Louis L. Hsu, Ping-Chuan Wang, Chih-Chao Yang 2014-01-07
8564025 Nanowire FET having induced radial strain Sarunya Bangsaruntip, Guy M. Cohen, Jeffrey W. Sleight 2013-10-22
8492208 Compressive (PFET) and tensile (NFET) channel strain in nanowire FETs fabricated with a replacement gate process Guy M. Cohen, Michael A. Guillorn 2013-07-23
8450205 Redundancy design with electro-migration immunity and method of manufacture Louis L. Hsu, Ping-Chuan Wang, Chih-Chao Yang 2013-05-28
8445892 p-FET with a strained nanowire channel and embedded SiGe source and drain stressors Guy M. Cohen, Michael J. Rooks 2013-05-21
8405215 Interconnect structure and method for Cu/ultra low k integration Chih-Chao Yang 2013-03-26
8399314 p-FET with a strained nanowire channel and embedded SiGe source and drain stressors Guy M. Cohen, Michael J. Rooks 2013-03-19
8362600 Method and structure to reduce soft error rate susceptibility in semiconductor structures Cyril Cabral, Jr., Michael S. Gordon, David F. Heidel, Kenneth P. Rodbell, Henry Tang 2013-01-29
8313990 Nanowire FET having induced radial strain Sarunya Bangsaruntip, Guy M. Cohen, Jeffrey W. Sleight 2012-11-20