Patent Leaderboard
USPTO Patent Rankings Data through Sept 30, 2025
CA

Christopher M. Abernathy — 49 Patents

IBM: 49 patents #1,780 of 70,183Top 3%
Texas: #1,774 of 125,132 inventorsTop 2%
Overall (All Time): #56,270 of 4,157,543Top 2%
49 Patents All Time

Issued Patents All Time

Showing 26–49 of 49 patents

Patent #TitleCo-InventorsDate
7991979 Issuing load-dependent instructions in an issue queue in a processing unit of a data processing system Mary D. Brown, William E. Burky, Todd A. Venton 2011-08-02
7913070 Time-of-life counter for handling instruction flushes from a queue Jonathan James DeMent, Ronald P. Hall, Robert Alan Philhower, David Shippy 2011-03-22
7900024 Handling data cache misses out-of-order for asynchronous pipelines Jeffrey Powers Bradford, Ronald P. Hall, Timothy H. Heil, David Shippy 2011-03-01
7890782 Dynamic power management in an execution unit using pipeline wave flow control Gilles Gervais, Rolf Hilgendorf 2011-02-15
7831808 Queue design system supporting dependency checking and issue for SIMD instructions within a general purpose processor Jonathan James DeMent, Ronald P. Hall, David Shippy 2010-11-09
7818544 Processor livelock recovery by gradual stalling of instruction processing rate during detection of livelock condition Kurt A. Feiste, Ronald P. Hall, Albert J. Van Norstrand, Jr. 2010-10-19
7769986 Method and apparatus for register renaming William E. Burky, Jens Leenstra, Nicolas Maeding 2010-08-03
7689812 Method and system for restoring register mapper states for an out-of-order microprocessor Mary D. Brown, Dung Q. Nguyen, Joel A. Silberman 2010-03-30
7681056 Dynamic power management in a processor design Jonathan James DeMent, Ronald P. Hall, Robert Alan Philhower, David Shippy 2010-03-16
7653848 Selectively engaging optional data reduction mechanisms for capturing trace data Lydia M. Do, Ronald P. Hall, Michael L. Karm 2010-01-26
7490224 Time-of-life counter design for handling instruction flushes from a queue Jonathan James DeMent, Ronald P. Hall, Robert Alan Philhower, David Shippy 2009-02-10
7475232 Performance of an in-order processor by no longer requiring a uniform completion point across different execution pipelines Jonathan James DeMent, Ronald P. Hall, Albert J. Van Norstrand, Jr. 2009-01-06
7469357 Method and apparatus for dynamic power management in an execution unit using pipeline wave flow control Gilles Gervais, Rolf Hilgendork 2008-12-23
7461239 Apparatus and method for handling data cache misses out-of-order for asynchronous pipelines Jeffrey Powers Bradford, Ronald P. Hall, Timothy H. Heil, David Shippy 2008-12-02
7437539 Issue unit for placing a processor into a gradual slow mode of operation in response to a detected livelock condition within a processor pipeline Kurt A. Feiste, Ronald P. Hall, Albert J. Van Norstrand, Jr. 2008-10-14
7434033 Placing a processor into a gradual slow mode of operation in response to a detected livelock condition within a processor pipeline Kurt A. Feiste, Ronald P. Hall, Albert J. Van Norstrand, Jr. 2008-10-07
7401242 Dynamic power management in a processor design Jonathan James DeMent, Ronald P. Hall, Robert Alan Philhower, David Shippy 2008-07-15
7363469 Method and system for on-demand scratch register renaming William E. Burky, James Albert Van Norstrand, Jr., Albert Thomas Williams 2008-04-22
7350056 Method and apparatus for issuing instructions from an issue queue in an information handling system Jonathan James DeMent, Kurt A. Feiste, David Shippy 2008-03-25
7328330 Queue design supporting dependency checking and issue for SIMD instructions within a general purpose processor Jonathan James DeMent, Ronald P. Hall, David Shippy 2008-02-05
7313673 Fine grained multi-thread dispatch block mechanism Jonathan James DeMent, Albert J. Van Norstrand, Jr., David Shippy 2007-12-25
7137013 Method and apparatus for dynamic power management in an execution unit using pipeline wave flow control Gilles Gervais, Rolf Hilgendork 2006-11-14
6934729 Method and system for performing shift operations Scott Raymond Cottier, Gilles Gervais 2005-08-23
6820227 Method and apparatus for performing error checking Gilles Gervais 2004-11-16