Issued Patents All Time
Showing 201–225 of 1,279 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11164787 | Two-stage top source drain epitaxy formation for vertical field effect transistors enabling gate last formation | Chun-Chen Yeh, Zuoguang Liu, Ruilong Xie | 2021-11-02 |
| 11164793 | Reduced source/drain coupling for CFET | Ruilong Xie, Chanro Park, Chun-Chen Yeh | 2021-11-02 |
| 11164907 | Resistive random access memory integrated with stacked vertical transistors | Karthik Balakrishnan, Bahman Hekmatshoartabari, Takashi Ando | 2021-11-02 |
| 11164960 | Transistor having in-situ doped nanosheets with gradient doped channel regions | Jingyun Zhang, Ruilong Xie | 2021-11-02 |
| 11165017 | Replacement bottom electrode structure process to form misalignment tolerate MRAM with high yield | Pouya Hashemi, Takashi Ando, Dimitri Houssameddine, Jingyun Zhang, Choonghyun Lee | 2021-11-02 |
| 11164792 | Complementary field-effect transistors | Ruilong Xie, Jingyun Zhang, Junli Wang | 2021-11-02 |
| 11158636 | Nanosheet device integrated with a FINFET transistor | Chun-Chen Yeh, Ruilong Xie | 2021-10-26 |
| 11158715 | Vertical FET with asymmetric threshold voltage and channel thicknesses | Choonghyun Lee, Takashi Ando, Jingyun Zhang, Pouya Hashemi | 2021-10-26 |
| 11158729 | Stacked vertical transport field effect transistor electrically erasable programmable read only memory (EEPROM) devices | Karthik Balakrishnan, Jeng-Bang Yau, Tak H. Ning | 2021-10-26 |
| 11158538 | Interconnect structures with cobalt-infused ruthenium liner and a cobalt cap | Joseph F. Maniscalco, Koichi Motoyama, Oscar van der Straten, Scott A. DeVries | 2021-10-26 |
| 11158756 | FinFET radiation dosimeter | Bahman Hekmatshoartabari, Jeng-Bang Yau, Karthik Balakrishnan | 2021-10-26 |
| 11152510 | Long channel optimization for gate-all-around transistors | Jingyun Zhang, Takashi Ando, Choonghyun Lee, Pouya Hashemi | 2021-10-19 |
| 11152478 | Vertical transistors with buried metal silicide bottom contact | Kangguo Cheng, Tak H. Ning | 2021-10-19 |
| 11152264 | Multi-Vt scheme with same dipole thickness for gate-all-around transistors | Jingyun Zhang, Takashi Ando | 2021-10-19 |
| 11152265 | Local isolation of source/drain for reducing parasitic capacitance in vertical field effect transistors | Ruilong Xie, Hemanth Jagannathan, Christopher J. Waskiewicz | 2021-10-19 |
| 11145816 | Resistive random access memory cells integrated with vertical field effect transistor | Bahman Hekmatshoartabari, Takashi Ando, Karthik Balakrishnan | 2021-10-12 |
| 11145380 | Analog nonvolatile memory cells using dopant activation | Heng Wu, Tenko Yamashita, Oleg Gluschenkov | 2021-10-12 |
| 11145668 | EEPROM cell and array having stacked nanosheet field effect transistors with a common floating gate | Karthik Balakrishnan, Jeng-Bang Yau, Tak H. Ning | 2021-10-12 |
| 11133217 | Late gate cut with optimized contact trench size | Balasubramanian S. Pranatharthi Haran, Praneet Adusumilli, Ruilong Xie | 2021-09-28 |
| 11121174 | MRAM integration into the MOL for fast 1T1M cells | Michael Rizzolo, Ruilong Xie | 2021-09-14 |
| 11114607 | Double magnetic tunnel junction device, formed by UVH wafer bonding | Virat Vasav Mehta | 2021-09-07 |
| 11114146 | Nanosecond non-destructively erasable magnetoresistive random-access memory | Eric Raymond Evarts, Virat Vasav Mehta, Bahman Hekmatshoartabari | 2021-09-07 |
| 11114606 | MRAM devices containing a harden gap fill dielectric material | Devika Sil, Oleg Gluschenkov, Yasir Sulehria | 2021-09-07 |
| 11107752 | Half buried nFET/pFET epitaxy source/drain strap | Jingyun Zhang, Ruilong Xie, Bruce B. Doris | 2021-08-31 |
| 11101217 | Buried power rail for transistor devices | Ruilong Xie, Junli Wang, Kangguo Cheng | 2021-08-24 |