Issued Patents All Time
Showing 1,076–1,100 of 1,279 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9355887 | Dual trench isolation for CMOS with hybrid orientations | Victor Chan, Meikei Ieong, Rajesh Rengarajan, Chun-Yung Sung, Min Yang | 2016-05-31 |
| 9356163 | Structure and method of integrating waveguides, photodetectors and logic devices | Fei Liu, Christine Qiqing Ouyang, Jeremy D. Schaub | 2016-05-31 |
| 9356027 | Dual work function integration for stacked FinFET | Kangguo Cheng, Pouya Hashemi, Ali Khakifirooz | 2016-05-31 |
| 9349835 | Methods for replacing gate sidewall materials with a low-k spacer | Kangguo Cheng, Ali Khakifirooz, Charan V. Surisetty | 2016-05-24 |
| 9349868 | Gate all-around FinFET device and a method of manufacturing same | Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi | 2016-05-24 |
| 9349808 | Double aspect ratio trapping | Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz | 2016-05-24 |
| 9349594 | Non-planar semiconductor device with aspect ratio trapping | Kangguo Cheng, Pouya Hashemi, Ali Khakifirooz | 2016-05-24 |
| 9349809 | Aspect ratio trapping and lattice engineering for III/V semiconductors | Kangguo Cheng, Pouya Hashemi, Ali Khakifirooz | 2016-05-24 |
| 9343529 | Method of formation of germanium nanowires on bulk substrates | Kangguo Cheng, Pouya Hashemi, Ali Khakifirooz | 2016-05-17 |
| 9343550 | Silicon-on-nothing FinFETs | Kangguo Cheng, Ali Khakifirooz, Dominic J. Schepis | 2016-05-17 |
| 9337335 | Structure and method to form localized strain relaxed SiGe buffer layer | Shogo Mochizuki | 2016-05-10 |
| 9337196 | III-V FinFET CMOS with III-V and germanium-containing channel closely spaced | Kangguo Cheng, Ali Khakifirooz, Ghavam G. Shahidi | 2016-05-10 |
| 9331201 | Multi-height FinFETs with coplanar topography background | Kangguo Cheng, Bruce B. Doris, Pouya Hashemi, Ali Khakifirooz | 2016-05-03 |
| 9330908 | Semiconductor structure with aspect ratio trapping capabilities | Thomas N. Adam, Kangguo Cheng, Pouya Hashemi, Ali Khakifirooz | 2016-05-03 |
| 9324843 | High germanium content silicon germanium fins | Karthik Balakrishnan, John Bruley, Pouya Hashemi, Ali Khakifirooz, John A. Ott | 2016-04-26 |
| 9324797 | Gate-all-around nanowire MOSFET and method of formation | Kangguo Cheng, Bruce B. Doris, Pouya Hashemi, Ali Khakifirooz | 2016-04-26 |
| 9324796 | Gate-all-around nanowire MOSFET and method of formation | Kangguo Cheng, Bruce B. Doris, Pouya Hashemi, Ali Khakifirooz | 2016-04-26 |
| 9324867 | Method to controllably etch silicon recess for ultra shallow junctions | Kangguo Cheng, Bruce B. Doris, Pouya Hashemi, Ali Khakifirooz | 2016-04-26 |
| 9324795 | Gate-all-around nanowire MOSFET and method of formation | Kangguo Cheng, Bruce B. Doris, Pouya Hashemi, Ali Khakifirooz | 2016-04-26 |
| 9318553 | Nanowire device with improved epitaxy | Kangguo Cheng, Pouya Hashemi, Ali Khakifirooz | 2016-04-19 |
| 9318608 | Uniform junction formation in FinFETs | Eric C. Harley, Judson R. Holt, Yue Ke, Timothy J. McArdle, Shogo Mochizuki | 2016-04-19 |
| 9318347 | Wafer backside particle mitigation | Marc A. Bergendahl, James J. Demarest, Alex Richard Hubbard, Richard C. Johnson, Ryan O. Jung +3 more | 2016-04-19 |
| 9312360 | FinFET with epitaxial source and drain regions and dielectric isolated channel region | Kangguo Cheng, Ramachandra Divakaruni, Ali Khakifirooz, Soon-Cheon Seo | 2016-04-12 |
| 9312273 | Structure and method to reduce crystal defects in epitaxial fin merge using nitride deposition | Thomas N. Adam, Kangguo Cheng, Ali Khakifirooz, Raghavasimhan Sreenivasan | 2016-04-12 |
| 9312173 | Self-limiting silicide in highly scaled fin technology | Kangguo Cheng, Bruce B. Doris, Pouya Hashemi, Ali Khakifirooz | 2016-04-12 |