Issued Patents All Time
Showing 1,001–1,025 of 1,279 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9472576 | Structure and method to reduce crystal defects in epitaxial fin merge using nitride deposition | Thomas N. Adam, Kangguo Cheng, Ali Khakifirooz, Raghavasimhan Sreenivasan | 2016-10-18 |
| 9472628 | Heterogeneous source drain region and extension region | Kangguo Cheng, Pouya Hashemi, Ali Khakifirooz | 2016-10-18 |
| 9472671 | Method and structure for forming dually strained silicon | Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi | 2016-10-18 |
| 9472471 | Hybrid orientation vertically stacked III-V and Ge gate-all-around CMOS | Karthik Balakrishnan, Pouya Hashemi, Sanghoon Lee | 2016-10-18 |
| 9472555 | Nanosheet CMOS with hybrid orientation | Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi | 2016-10-18 |
| 9472460 | Uniform depth fin trench formation | Kangguo Cheng, Ali Khakifirooz, Dominic J. Schepis, Pouya Hashemi | 2016-10-18 |
| 9472470 | Methods of forming FinFET with wide unmerged source drain EPI | Kangguo Cheng, Ali Khakifirooz, Dominic J. Schepis | 2016-10-18 |
| 9466672 | Reduced defect densities in graded buffer layers by tensile strained interlayers | Kangguo Cheng, Keith E. Fogel, Pouya Hashemi, John A. Ott | 2016-10-11 |
| 9466673 | Complementary metal-oxide silicon having silicon and silicon germanium channels | Gen P. Lauer, Isaac Lauer, Jeffrey W. Sleight | 2016-10-11 |
| 9466690 | Precisely controlling III-V height | Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi | 2016-10-11 |
| 9466702 | Semiconductor device including multiple fin heights | Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi | 2016-10-11 |
| 9466567 | Nanowire compatible E-fuse | Kangguo Cheng, Bruce B. Doris, Pouya Hashemi, Ali Khakifirooz | 2016-10-11 |
| 9466602 | Embedded dynamic random access memory field effect transistor device | Veeraraghavan S. Basker, Shogo Mochizuki, Dominic J. Schepis | 2016-10-11 |
| 9466616 | Uniform junction formation in FinFETs | Eric C. Harley, Judson R. Holt, Yue Ke, Timothy J. McArdle, Shogo Mochizuki | 2016-10-11 |
| 9461146 | Overhang hardmask to prevent parasitic epitaxial nodules at gate end during source drain epitaxy | Kangguo Cheng, Pouya Hashemi, Shogo Mochizuki | 2016-10-04 |
| 9461052 | Embedded dynamic random access memory field effect transistor device | Veeraraghavan S. Basker, Shogo Mochizuki, Dominic J. Schepis | 2016-10-04 |
| 9455141 | Silicon-germanium fin of height above critical thickness | Kanggou Cheng, Ali Khakifirooz, Dominic J. Schepis | 2016-09-27 |
| 9455336 | SiGe and Si FinFET structures and methods for making the same | Kangguo Cheng, Bruce B. Doris, Pouya Hashemi, Ali Khakifirooz | 2016-09-27 |
| 9450079 | FinFET having highly doped source and drain regions | Kangguo Cheng, Ali Khakifirooz, Dominic J. Schepis | 2016-09-20 |
| 9449885 | High germanium content FinFET devices having the same contact material for nFET and pFET devices | — | 2016-09-20 |
| 9449921 | Voidless contact metal structures | Veeraraghavan S. Basker, Nicolas L. Breil, Oleg Gluschenkov, Shogo Mochizuki | 2016-09-20 |
| 9443873 | Structure and method for tensile and compressive strained silicon germanium with same germanium concentration by single epitaxy step | Pranita Kerber, Qiqing C. Ouyang, Dominic J. Schepis | 2016-09-13 |
| 9443948 | Gate-all-around nanowire MOSFET and method of formation | Kangguo Cheng, Bruce B. Doris, Pouya Hashemi, Ali Khakifirooz | 2016-09-13 |
| 9443963 | SiGe FinFET with improved junction doping control | Pranita Kerber, Qiqing C. Ouyang | 2016-09-13 |
| 9443982 | Vertical transistor with air gap spacers | Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi | 2016-09-13 |