Issued Patents All Time
Showing 26–50 of 173 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10811304 | Increased isolation of diffusion breaks in FinFET devices using an angled etch | Sony Varghese | 2020-10-20 |
| 10804156 | Techniques for forming dual epitaxial source/drain semiconductor device | Rajesh Prasad | 2020-10-13 |
| 10790395 | finFET with improved nitride to fin spacing | Injo Ok, Ruilong Xie, Chanro Park | 2020-09-29 |
| 10755965 | Method and device isolation structure in finFET | — | 2020-08-25 |
| 10720357 | Method of forming transistor device having fin cut regions | Naushad K. Variam, Sony Varghese, Johannes M. van Meer, Jae-Young Lee, Jun Seok Lee | 2020-07-21 |
| 10692775 | Fin damage reduction during punch through implantation of FinFET device | Jae-Young Lee, Johannes M. van Meer, Sony Varghese, Naushad K. Variam | 2020-06-23 |
| 10685865 | Method and device for power rail in a fin type field effect transistor | Sony Varghese, Johannes M. van Meer, John Hautala | 2020-06-16 |
| 10686033 | Fin damage reduction during punch through implantation of FinFET device | Jae-Young Lee, Johannes M. van Meer, Sony Varghese, Naushad K. Variam | 2020-06-16 |
| 10644117 | Techniques for contact formation in self-aligned replacement gate device | Wenhui Wang, Jun Seok Lee, Sony Varghese | 2020-05-05 |
| 10629741 | Method and device for shallow trench isolation in a fin type field effect transistors | Johannes M. van Meer | 2020-04-21 |
| 10629437 | Techniques and structure for forming dynamic random-access device using angled ions | Sony Varghese, John Hautala, Steven R. Sherman, Rajesh Prasad | 2020-04-21 |
| 10607847 | Gate all around device and method of formation using angled ions | Sony Varghese, Anthony Renau, Morgan Evans, Joseph C. Olson | 2020-03-31 |
| 10580651 | Integration of device regions | Sony Varghese | 2020-03-03 |
| 10546770 | Method and device isolation structure in finFET | — | 2020-01-28 |
| 10510870 | Techniques for forming device having etch-resistant isolation oxide | Sony Varghese, Jae-Young Lee, Johannes M. van Meer | 2019-12-17 |
| 10510610 | Structure and method of forming fin device having improved fin liner | Naushad K. Variam, Sony Varghese, Johannes M. van Meer, Jae-Young Lee | 2019-12-17 |
| 10497798 | Vertical field effect transistor with self-aligned contacts | Ruilong Xie, Steven Bentley, Puneet Harischandra Suvarna, Chanro Park, Lars Liebmann +2 more | 2019-12-03 |
| 10461196 | Control of length in gate region during processing of VFET structures | Chanro Park, Steven Bentley, Ruilong Xie | 2019-10-29 |
| 10446399 | Hard mask layer to reduce loss of isolation material during dummy gate removal | Ruilong Xie, Chanro Park, Hoon Kim | 2019-10-15 |
| 10446653 | Transistor-based semiconductor device with air-gap spacers and gate contact over active area | Ruilong Xie, Chanro Park, Lars Liebmann, Hoon Kim | 2019-10-15 |
| 10410933 | Replacement metal gate patterning for nanosheet devices | Ruilong Xie, Chanro Park, Hoon Kim, Hui Zang, Guowei Xu | 2019-09-10 |
| 10403552 | Replacement gate formation with angled etch and deposition | Naushad K. Variam, Sony Varghese, Johannes M. van Meer, Jae-Young Lee | 2019-09-03 |
| 10403738 | Techniques for improved spacer in nanosheet device | Rajesh Prasad, John Hautala, Sony Varghese | 2019-09-03 |
| 10403547 | Structure and method of forming self aligned contacts in semiconductor device | — | 2019-09-03 |
| 10388652 | Intergrated circuit structure including single diffusion break abutting end isolation region, and methods of forming same | Yongiun Shi, Lei Sun, Laertis Economikos, Ruilong Xie, Lars Liebmann +4 more | 2019-08-20 |