Issued Patents All Time
Showing 76–100 of 173 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10014297 | Methods of forming integrated circuit structure using extreme ultraviolet photolithography technique and related integrated circuit structure | Lei Sun, Wenhui Wang, Xunyuan Zhang, Ruilong Xie, Jia Zeng +2 more | 2018-07-03 |
| 10008577 | Methods of forming an air-gap spacer on a semiconductor device and the resulting device | Ruilong Xie, Chanro Park, Hoon Kim | 2018-06-26 |
| 10002932 | Self-aligned contact protection using reinforced gate cap and spacer portions | Ruilong Xie, Hoon Kim, Chanro Park | 2018-06-19 |
| 9991131 | Dual mandrels to enable variable fin pitch | Ruilong Xie, Chanro Park | 2018-06-05 |
| 9978608 | Fin patterning for a fin-type field-effect transistor | Ruilong Xie, Nigel G. Cave, Lars Liebmann | 2018-05-22 |
| 9966456 | Methods of forming gate electrodes on a vertical transistor device | Chanro Park, Steven Bentley, Hoon Kim, Ruilong Xie | 2018-05-08 |
| 9953879 | Preventing oxidation defects in strain-relaxed fins by reducing local gap fill voids | Hoon Kim, Chanro Park, Ruilong Xie | 2018-04-24 |
| 9947804 | Methods of forming nanosheet transistor with dielectric isolation of source-drain regions and related structure | Julien Frougier, Ruilong Xie, Chanro Park, Steven Bentley | 2018-04-17 |
| 9911619 | Fin cut with alternating two color fin hardmask | Ruilong Xie, Hoon Kim, Catherine B. Labelle, Lars Liebmann, Chanro Park | 2018-03-06 |
| 9899321 | Methods of forming a gate contact for a semiconductor device above the active region | Chanro Park, Ruilong Xie, Hoon Kim | 2018-02-20 |
| 9876077 | Methods of forming a protection layer on an isolation region of IC products comprising FinFET devices | Ruilong Xie, Christopher M. Prindle, Tek Po Rinus Lee | 2018-01-23 |
| 9875940 | Methods for forming transistor devices with different threshold voltages and the resulting devices | Hoon Kim, Ruilong Xie, Chanro Park | 2018-01-23 |
| 9875905 | FinFET devices having fins with a tapered configuration and methods of fabricating the same | Ruilong Xie, Catherine B. Labelle | 2018-01-23 |
| 9865704 | Single and double diffusion breaks on integrated circuit products comprised of FinFET devices | Ruilong Xie, Kwan-Yong Lim, Ryan Ryoung-Han Kim | 2018-01-09 |
| 9859125 | Block patterning method enabling merged space in SRAM with heterogeneous mandrel | Ruilong Xie, Chanro Park, Hoon Kim, Kwan-Yong Lim | 2018-01-02 |
| 9847390 | Self-aligned wrap-around contacts for nanosheet devices | Ruilong Xie, Chanro Park, Hoon Kim | 2017-12-19 |
| 9847418 | Methods of forming fin cut regions by oxidizing fin portions | Kwan-Yong Lim, Chanro Park | 2017-12-19 |
| 9837404 | Methods, apparatus and system for STI recess control for highly scaled finFET devices | Chanro Park, Hoon Kim, Ruilong Xie, Kwan-Yong Lim | 2017-12-05 |
| 9831132 | Methods for forming fin structures | Chanro Park, Hoon Kim, Ruilong Xie | 2017-11-28 |
| 9824920 | Methods of forming self-aligned contact structures by work function material layer recessing and the resulting devices | Chanro Park, Ruilong Xie, Hoon Kim | 2017-11-21 |
| 9818836 | Gate cut method for replacement metal gate integration | Ruilong Xie, Chanro Park, Dong-Ick Lee | 2017-11-14 |
| 9799748 | Method of forming inner spacers on a nano-sheet/wire device | Ruilong Xie, Chanro Park, Hoon Kim | 2017-10-24 |
| 9780208 | Method and structure of forming self-aligned RMG gate for VFET | Ruilong Xie, Chanro Park, Hoon Kim | 2017-10-03 |
| 9780197 | Method of controlling VFET channel length | Ruilong Xie, Chanro Park, Hoon Kim | 2017-10-03 |
| 9779960 | Hybrid fin cutting processes for FinFET semiconductor devices | Ruilong Xie, Catherine B. Labelle | 2017-10-03 |