Issued Patents All Time
Showing 51–75 of 96 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6513996 | Integrated equipment to drain water-hexane developer for pattern collapse | Ramkumar Subramanian, Bhanwar Singh | 2003-02-04 |
| 6495435 | Method for improved control of lines adjacent to a select gate using a mask assist feature | Hao Fang, Maria C. Chan | 2002-12-17 |
| 6492075 | Chemical trim process | Ramkumar Subramanian, Bharath Rangarajan | 2002-12-10 |
| 6459482 | Grainless material for calibration sample | Bhanwar Singh, Ramkumar Subramanian, Khoi A. Phan, Bharath Rangarajan, Sanjay K. Yedur +1 more | 2002-10-01 |
| 6455888 | Memory cell structure for elimination of oxynitride (ONO) etch residue and polysilicon stringers | Kathleen R. Early, Nicholas H. Tripsas, Maria C. Chan | 2002-09-24 |
| 6455416 | Developer soluble dyed BARC for dual damascene process | Ramkumar Subramanian, Bhanwar Singh, Bharath Rangarajan | 2002-09-24 |
| 6455332 | Methodology to mitigate electron beam induced charge dissipation on polysilicon fine patterning | Bhanwar Singh | 2002-09-24 |
| 6451512 | UV-enhanced silylation process to increase etch resistance of ultra thin resists | Bharath Rangarajan, Ramkumar Subramanian, Khoi A. Phan, Bhanwar Singh, Sanjay K. Yedur +1 more | 2002-09-17 |
| 6445072 | Deliberate void in innerlayer dielectric gapfill to reduce dielectric constant | Ramkumar Subramanian, Bhanwar Singh, Bharath Rangarajan | 2002-09-03 |
| 6445051 | Method and system for providing contacts with greater tolerance for misalignment in a flash memory | Mark S. Chang, Hao Fang, King Wai Kelwin Ko, John Jianshi Wang, Lu You +1 more | 2002-09-03 |
| 6444381 | Electron beam flood exposure technique to reduce the carbon contamination | Bhanwar Singh, Ramkumar Subramanian, Bharath Rangarajan, Khoi A. Phan, Bryan K. Choo +1 more | 2002-09-03 |
| 6423650 | Ultra-thin resist coating quality by increasing surface roughness of the substrate | Marina V. Plat, Christopher F. Lyons, Bhanwar Singh | 2002-07-23 |
| 6423475 | Sidewall formation for sidewall patterning of sub 100 nm structures | Christopher F. Lyons, Kathleen R. Early | 2002-07-23 |
| 6420702 | Non-charging critical dimension SEM metrology standard | Nicholas H. Tripsas, Bhanwar Singh | 2002-07-16 |
| 6376013 | Multiple nozzles for dispensing resist | Bharath Rangarajan, Bhanwar Singh, Sanjay K. Yedur | 2002-04-23 |
| 6365945 | Submicron semiconductor device having a self-aligned channel stop region and a method for fabricating the semiconductor device using a trim and etch | Masaaki Higashitani, John Jianshi Wang | 2002-04-02 |
| 6354133 | Use of carbon nanotubes to calibrate conventional tips used in AFM | Sanjay K. Yedur, Bhanwar Singh, Bryan K. Choo, Ramkumar Subramanian | 2002-03-12 |
| 6350559 | Method for creating thinner resist coating that also has fewer pinholes | Kathleen R. Early, Christopher F. Lyons | 2002-02-26 |
| 6335152 | Use of RTA furnace for photoresist baking | Ramkumar Subramanian, Bharath Rangarajan, Bhanwar Singh | 2002-01-01 |
| 6329124 | Method to produce high density memory cells and small spaces by using nitride spacer | Bharath Rangarajan, Bhanwar Singh | 2001-12-11 |
| 6326231 | Use of silicon oxynitride ARC for metal layers | Ramkumar Subramanian, Bhanwar Singh, Sanjay K. Yedur, Marina V. Plat, Christopher F. Lyons +1 more | 2001-12-04 |
| 6316804 | Oxygen implant self-aligned, floating gate and isolation structure | Kathleen R. Early | 2001-11-13 |
| 6291137 | Sidewall formation for sidewall patterning of sub 100 nm structures | Christopher F. Lyons, Kathleen R. Early | 2001-09-18 |
| 6274289 | Chemical resist thickness reduction process | Ramkumar Subramanian, Bharath Rangarajan, Ursula Q. Quinto | 2001-08-14 |
| 6270579 | Nozzle arm movement for resist development | Ramkumar Subramanian, Khoi A. Phan, Bharath Rangarajan, Bhanwar Singh, Sanjay K. Yedur | 2001-08-07 |