Issued Patents All Time
Showing 26–50 of 77 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7622348 | Methods for fabricating an integrated circuit | — | 2009-11-24 |
| 7601574 | Methods for fabricating a stress enhanced MOS transistor | — | 2009-10-13 |
| 7544572 | Multi-operational mode transistor with multiple-channel device structure | John G. Pellerin | 2009-06-09 |
| 7462549 | Shallow trench isolation process and structure with minimized strained silicon consumption | Qi Xiang, Jung-Suk Goo | 2008-12-09 |
| 7432152 | Methods of forming HSG layers and devices | Randhir P. S. Thakur | 2008-10-07 |
| 7339226 | Dual-level stacked flash memory cell with a MOSFET storage transistor | Ning Cheng, Christy Mein Chu Woo | 2008-03-04 |
| 7329582 | Methods for fabricating a semiconductor device, which include selectively depositing an electrically conductive material | Jonathan B. Smith, Ming-Ren Lin | 2008-02-12 |
| 7253484 | Low-power multiple-channel fully depleted quantum well CMOSFETs | John G. Pellerin, Jon D. Cheek | 2007-08-07 |
| 7229890 | Forming integrated circuits using selective deposition of undoped silicon film seeded in chlorine and hydride gas | Randhir P. S. Thakur | 2007-06-12 |
| 7224007 | Multi-channel transistor with tunable hot carrier effect | Andrew Waite | 2007-05-29 |
| 7202123 | Mesa isolation technology for extremely thin silicon-on-insulator semiconductor devices | — | 2007-04-10 |
| 7138302 | Method of fabricating an integrated circuit channel region | Qi Xiang, Jung-Suk Goo | 2006-11-21 |
| 7091118 | Replacement metal gate transistor with metal-rich silicon layer and method for making the same | John G. Pellerin, Linda Black, Michael P. Chudzik, Rajarao Jammy | 2006-08-15 |
| 7078299 | Formation of finFET using a sidewall epitaxial layer | Witold P. Maszara, Jung-Suk Goo, Qi Xiang | 2006-07-18 |
| 7078278 | Dual-metal CMOS transistors with tunable gate electrode work function and method of making the same | Ming-Ren Lin | 2006-07-18 |
| 7074657 | Low-power multiple-channel fully depleted quantum well CMOSFETs | John G. Pellerin, Jon D. Cheek | 2006-07-11 |
| 7071086 | Method of forming a metal gate structure with tuning of work function by silicon incorporation | Christy Mei-Chu Woo, Paul R. Besser, Minh Van Ngo, Jinsong Yin | 2006-07-04 |
| 7060571 | Semiconductor device with metal gate and high-k tantalum oxide or tantalum oxynitride gate dielectric | Minh Van Ngo, Christy Mei-Chu Woo, Paul R. Besser, Jinsong Yin | 2006-06-13 |
| 7045384 | Method for determining metal work function by formation of Schottky diodes with shadow mask | Christy Mei-Chu Woo | 2006-05-16 |
| 7033869 | Strained silicon semiconductor on insulator MOSFET | Qi Xiang, Jung-Suk Goo | 2006-04-25 |
| 7033919 | Fabrication of dual work-function metal gate structure for complementary field effect transistors | Allen S. Yu | 2006-04-25 |
| 7033888 | Engineered metal gate electrode | Paul R. Besser, Christy Mei-Chu Woo, Minh Van Ngo, Jinsong Yin | 2006-04-25 |
| 7029537 | Method of processing selected surfaces in a semiconductor process chamber based on a temperature differential between surfaces | — | 2006-04-18 |
| 7022570 | Methods of forming hemispherical grained silicon on a template on a semiconductor work object | Guoqing Chen | 2006-04-04 |
| 7018887 | Dual metal CMOS transistors with silicon-metal-silicon stacked gate electrode | — | 2006-03-28 |