ST

Su Tao

AE Advanced Semiconductor Engineering: 73 patents #3 of 1,073Top 1%
IT ITRI: 3 patents #2,499 of 9,619Top 30%
📍 Pitou Township, TW: #1 of 9 inventorsTop 15%
Overall (All Time): #24,559 of 4,157,543Top 1%
77
Patents All Time

Issued Patents All Time

Showing 51–75 of 77 patents

Patent #TitleCo-InventorsDate
6342443 Method and structure for forming flip chip with collapse-controlled solder bumps on a substrate Wei-Chung Wang, Jen-Kuang Fang 2002-01-29
6316828 Structure of a solder mask for the circuit module of a BGA substrate Tao-Yu Chen, Kao-Yu Hsu 2001-11-13
6312976 Method for manufacturing leadless semiconductor chip package Chun-Hung Lin, Chun-Chi Lee 2001-11-06
6313413 Wire structure of substrate for layout detection Kun-Ching Chen, Yire-Zine Lee, Yung-I Yeh 2001-11-06
6300166 Method for packaging a BGA and the structure of a substrate for use with the method Yu-Ching Tsai, Meng-Hui Lin, Chin-Ming Chung 2001-10-09
6265768 Chip scale package Ching-Huei Su 2001-07-24
6258626 Method of making stacked chip package Hsueh-Te Wang 2001-07-10
6252305 Multichip module having a stacked chip arrangement Chun-Hung Lin, Kuang-Hui Chen, Shyh-Wei Wang 2001-06-26
6229702 Ball grid array semiconductor package having improved heat dissipation efficiency, overall electrical performance and enhanced bonding capability Chin-Long Wu, Tai-Chun Huang, Han-Hsiang Huang, Shih-Kuang Chen, Shin-Hua Chao 2001-05-08
6215193 Multichip modules and manufacturing method therefor Meng-Hui Lin 2001-04-10
6211574 Semiconductor package with wire protection and method therefor Chun-Hung Lin, Tai-Chun Huang 2001-04-03
6204559 Ball grid assembly type semiconductor package having improved chip edge support to prevent chip cracking Chun-Hung Lin, Yire-Zine Lee, Jian Chen 2001-03-20
6201299 Substrate structure of BGA semiconductor package Chih-Ming Chung, Jian-Cheng Chen, Chun-Chi Lee 2001-03-13
6191360 Thermally enhanced BGA package Han-Hsiang Huang, Kun-Ching Chen, Chun-Chi Lee 2001-02-20
6190529 Method for plating gold to bond leads on a semiconductor substrate Yei-Shen Wu, Kun-Ching Chen 2001-02-20
6176416 Method of making low-profile wire connection Yu-Fang Tsai 2001-01-23
6176417 Ball bonding method on a chip Yu-Fang Tsai, Simon Lee, Tao-Yu Chen 2001-01-23
6172318 Base for wire bond checking Chin-Chen Wang, Yao-Hsin Feng 2001-01-09
6161753 Method of making a low-profile wire connection for stacked dies Yu-Fang Tsai, Sung-Fei Wang, Meng-Hui Lin 2000-12-19
6153939 Flip-chip semiconductor device with enhanced reliability and manufacturing efficiency, and the method for under filling the same Wei-Chung Wang, Hsueh-Te Wang, Jen-Kuang Fang 2000-11-28
6150730 Chip-scale semiconductor package Chih-Ming Chung, Kuo-Pin Yang, Jen-Kuang Fang 2000-11-21
6135522 Sucker for transferring packaged semiconductor device Jau-Yuen Su 2000-10-24
6118176 Stacked chip assembly utilizing a lead frame Kuang-Lin Lo, Kuang-Chun Chou, Shih-Chih Chen 2000-09-12
6093960 Semiconductor package having a heat spreader capable of preventing being soldered and enhancing adhesion and electrical performance Kuang-Lin Lo, Hsin-Hsing Wei 2000-07-25
6048184 Back-pressure sealing system for revolving compressor Yu-Choung Chang, Tse-Liang Hsiao, Kun-I Liang, Chun-Chung Yang, Ann Huang +1 more 2000-04-11