Kun-Ching Chen — 20 Patents at Advanced Semiconductor Engineering

Kun-Ching Chen has been granted 20 US patents while listed as an inventor at Advanced Semiconductor Engineering. The first was granted in 1999 and the most recent in May 2014. Kun-Ching Chen ranks #214,803 of 4,157,543 US inventors in our database (top 5.2%). Patent records list Kun-Ching Chen in Tainan, TW.

Issued Patents All Time

Showing 1–20 of 20 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
8720053	Process of fabricating a circuit board	Shih-Chang Lee, Ming-Loung Lu, Chun-Che Lee	2014-05-13	$3,285,000
7125745	Multi-chip package substrate for flip-chip and wire bonding	Yi Ding, Po-Jen Cheng, Chih-Ming Chung, Yun-Hsiang Tien	2006-10-24	$292,000
7061347	High frequency substrate comprised of dielectric layers of different dielectric coefficients	Sung-Mao Wu	2006-06-13	$237,000
7061084	Lead-bond type chip package and manufacturing method thereof	Yung-I Yeh	2006-06-13	$237,000
6750397	Thermally enhanced semiconductor build-up package	In-De Ou, Yi Ding	2004-06-15	$363,000
6737300	Chip scale package and manufacturing method	Yi Ding, Xin Lee	2004-05-18	$332,000
6714421	Flip chip package substrate	Ho-Ming Tong, Chun-Chi Lee	2004-03-30	$268,000
6701614	Method for making a build-up package of a semiconductor	Yi Ding, In-De Ou	2004-03-09	$1,093,000
6680529	Semiconductor build-up package	Yi Ding, In-De Ou	2004-01-20	$1,402,000
6642612	Lead-bond type chip package and manufacturing method thereof	Yung-I Yeh	2003-11-04	$1,199,000
6551855	Substrate strip and manufacturing method thereof	Yi Ding, Yung-I Yeh	2003-04-22	$418,000
6534852	Ball grid array semiconductor package with improved strength and electric performance and method for making the same	Chun-Hung Lin, I Lee, Su Tao	2003-03-18	$430,000
6528882	Thermal enhanced ball grid array package	Yi Ding, Chang-Chi Lee, Yung-I Yeh	2003-03-04	$138,000
6455941	Chip scale package	Xin Lee, Yi Ding	2002-09-24	$894,000
6423622	Lead-bond type chip package and manufacturing method thereof	Yung-I Yeh	2002-07-23	$1,089,000
6313413	Wire structure of substrate for layout detection	Yire-Zine Lee, Yung-I Yeh, Su Tao	2001-11-06	$789,000
6252309	Packaged semiconductor substrate	Wu Wang, Yung-I Yeh, Shyh-Ing Wu	2001-06-26	$977,000
6191360	Thermally enhanced BGA package	Su Tao, Han-Hsiang Huang, Chun-Chi Lee	2001-02-20	$1,173,000
6190529	Method for plating gold to bond leads on a semiconductor substrate	Yei-Shen Wu, Su Tao	2001-02-20	$1,173,000
5982625	Semiconductor packaging device	Tao-Yu Chen, Yung-I Yeh, Wu Wang, Chun-Che Lee, Chun-Hsiung Huang +1 more	1999-11-09

Kun-Ching Chen — 20 Patents

Issued Patents All Time

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