PM

Patrick Morrow

IN Intel: 23 patents #27 of 4,430Top 1%
Overall (2024): #1,821 of 561,600Top 1%
23
Patents 2024

Issued Patents 2024

Patent #TitleCo-InventorsDate
12176323 Microelectronic assemblies Adel A. Elsherbini, Henning Braunisch, Aleksandar Aleksov, Shawna M. Liff, Johanna M. Swan +3 more 2024-12-24
12148806 Stacked source-drain-gate connection and process for forming such Ehren Mannebach, Aaron D. Lilak, Hui Jae Yoo, Anh Phan, Willy Rachmady +2 more 2024-11-19
12107085 Interconnect techniques for electrically connecting source/drain regions of stacked transistors Aaron D. Lilak, Gilbert Dewey, Cheng-Ying Huang, Christopher J. Jezewski, Ehren Mannebach +4 more 2024-10-01
12100623 Vertically stacked finFETs and shared gate patterning Aaron D. Lilak, Sean T. Ma, Justin R. Weber, Rishabh Mehandru, Stephen M. Cea +1 more 2024-09-24
12100762 Wrap-around source/drain method of making contacts for backside metals Kimin Jun, Il-Seok Son, Donald W. Nelson 2024-09-24
12100761 Wrap-around source/drain method of making contacts for backside metals Kimin Jun, Il-Seok Son, Donald W. Nelson 2024-09-24
12080605 Backside contacts for semiconductor devices Aaron D. Lilak, Ehren Mannebach, Anh Phan, Richard E. Schenker, Stephanie A. Bojarski +4 more 2024-09-03
12057494 Stacked transistors Rishabh Mehandru, Aaron D. Lilak 2024-08-06
12051723 PN-body-tied field effect transistors Aaron D. Lilak, Kerryann Marrietta Foley, Sayed Hasan, Willy Rachmady 2024-07-30
12020929 Epitaxial layer with substantially parallel sides Cheng-Ying Huang, Gilbert Dewey, Jack T. Kavalieros, Aaron D. Lilak, Ehren Mannebach +3 more 2024-06-25
11996362 Integrated circuit device with crenellated metal trace layout Mauro J. Kobrinsky, Mark Bohr, Tahir Ghani, Rishabh Mehandru, Ranjith Kumar 2024-05-28
11996411 Stacked forksheet transistors Cheng-Ying Huang, Gilbert Dewey, Anh Phan, Nicole K. Thomas, Urusa Alaan +8 more 2024-05-28
11990899 Multi-level spin logic Sasikanth Manipatruni, Ian A. Young, Dmitri E. Nikonov, Uygar E. Avci, Anurag Chaudhry 2024-05-21
11948874 Vertically spaced intra-level interconnect line metallization for integrated circuit devices Kevin Lin, Sukru YEMENICIOGLU, Richard E. Schenker, Mauro J. Kobrinsky 2024-04-02
11948831 Apparatus with multi-wafer based device and method for forming such Anup Pancholi, Prashant Majhi, Paul B. Fischer 2024-04-02
11942416 Sideways vias in isolation areas to contact interior layers in stacked devices Ehren Mannebach, Aaron D. Lilak, Hui Jae Yoo, Anh Phan, Willy Rachmady +3 more 2024-03-26
11942526 Integrated circuit contact structures Glenn A. Glass, Anand S. Murthy, Rishabh Mehandru 2024-03-26
11935891 Non-silicon N-type and P-type stacked transistors for integrated circuit devices Gilbert Dewey, Ravi Pillarisetty, Rishabh Mehandru, Cheng-Ying Huang, Willy Rachmady +1 more 2024-03-19
11935933 Backside contact structures and fabrication for metal on both sides of devices Rishabh Mehandru, Aaron D. Lilak, Kimin Jun 2024-03-19
11916118 Stacked source-drain-gate connection and process for forming such Ehren Mannebach, Aaron D. Lilak, Hui Jae Yoo, Anh Phan, Willy Rachmady +2 more 2024-02-27
11894262 Back side processing of integrated circuit structures to form insulation structure between adjacent transistor structures Aaron D. Lilak, Rishabh Mehandru 2024-02-06
11894372 Stacked trigate transistors with dielectric isolation and process for forming such Willy Rachmady, Cheng-Ying Huang, Gilbert Dewey, Aaron D. Lilak, Anh Phan +2 more 2024-02-06
11869894 Metallization structures for stacked device connectivity and their methods of fabrication Aaron D. Lilak, Anh Phan, Willy Rachmady, Gilbert Dewey, Jessica M. Torres +6 more 2024-01-09