Issued Patents 2023
Showing 1–23 of 23 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11854973 | Semiconductor device with reduced resistance and method for manufacturing the same | Fei Fan DUAN, Fong-Yuan Chang, Chi-Yu Lu, Chih-Liang Chen | 2023-12-26 |
| 11842946 | Semiconductor package having an encapsulant comprising conductive fillers and method of manufacture | Xinyu BAO, Lee-Chung Lu, Jyh Chwen Frank Lee, Fong-Yuan Chang, Sam Vaziri | 2023-12-12 |
| 11824254 | Antenna effect protection and electrostatic discharge protection for three-dimensional integrated circuit | Fong-Yuan Chang, Tsui-Ping Wang, Yi-Shin Chu | 2023-11-21 |
| 11817324 | Info packages including thermal dissipation blocks | Ching-Yi Lin, Yu-Hao Chen, Fong-Yuan Chang, Jyh Chwen Frank Lee, Shuo-Mao Chen | 2023-11-14 |
| 11804195 | Display equipment, brightness compensation device and brightness compensation method | Chia-Hsing Hou, Yu-Lin Cheng, Chung-Wen Wu | 2023-10-31 |
| 11799001 | Back-end-of-line devices | Yu-Hsiang Chen, Wen-Sheh Huang, Hsing-Leo Tsai, Chia-En Huang | 2023-10-24 |
| 11790151 | System for generating layout diagram including wiring arrangement | Fong-Yuan Chang, Chin-Chou Liu, Hui-Zhong Zhuang, Meng-Kai Hsu, Pin-Dai Sue +3 more | 2023-10-17 |
| 11775727 | Method for generating layout diagram including wiring arrangement | Fong-Yuan Chang, Chin-Chou Liu, Hui-Zhong Zhuang, Meng-Kai Hsu, Pin-Dai Sue +3 more | 2023-10-03 |
| 11756951 | Layout design methodology for stacked devices | Fong-Yuan Chang, Chin-Chou Liu, Chin-Her Chien, Ka Fai Chang | 2023-09-12 |
| 11749584 | Heat dissipation structures | Chin-Chou Liu, Chin-Her Chien, Fong-Yuan Chang, Hui Yu Lee | 2023-09-05 |
| 11727188 | Semiconductor device including protruding conductor cell regions | Fong-Yuan Chang, Chin-Chou Liu, Sheng-Hsiung Chen | 2023-08-15 |
| 11704472 | Standard cells and variations thereof within a standard cell library | Sheng-Hsiung Chen, Jerry Chang Jui Kao, Fong-Yuan Chang, Shao-Huan Wang, XinYong WANG +2 more | 2023-07-18 |
| 11694926 | Barrier free interface between beol interconnects | Hsiu-Wen Hsueh, Chii-Ping Chen, Ya-Ching Tseng | 2023-07-04 |
| 11694973 | Electromagnetic shielding metal-insulator-metal capacitor structure | Hui Yu Lee, Chin-Chou Liu, Cheng-Hung Yeh, Fong-Yuan Chang, Yi-Kan Cheng +1 more | 2023-07-04 |
| 11675954 | Method of designing a device | Sheng-Hsiung Chen, Jyun-Hao Chang, Ting-Wei Chiang, Fong-Yuan Chang, I-Lun Tseng | 2023-06-13 |
| 11658157 | Integrated circuit including a first semiconductor wafer and a second semiconductor wafer, semiconductor device including a first semiconductor wafer and a second semiconductor wafer and method of manufacturing same | Chih-Lin Chen, Hui Yu Lee, Fong-Yuan Chang, Chin-Chou Liu | 2023-05-23 |
| 11637098 | Pin modification for standard cells | Fong-Yuan Chang, Lee-Chung Lu, Chun-Chen Chen, Chung-Te Lin, Ting-Wei Chiang +2 more | 2023-04-25 |
| 11626368 | Semiconductor device having fuse array and method of making the same | Meng-Sheng Chang, Shao-Yu Chou, An-Jiao Fu, Chih-Hao Chen | 2023-04-11 |
| 11586797 | Through-silicon vias in integrated circuit packaging | Fong-Yuan Chang, Chin-Chou Liu, Chin-Her Chien, Cheng-Hung Yeh, Sen-Bor Jan +2 more | 2023-02-21 |
| 11574107 | Method for manufacturing a cell having pins and semiconductor device based on same | Pin-Dai Sue, Fong-Yuan Chang, Chi-Yu Lu, Sheng-Hsiung Chen, Chin-Chou Liu +4 more | 2023-02-07 |
| 11568122 | Integrated circuit fin layout method | Fong-Yuan Chang, Clement Hsingjen Wann, Chih-Hsin Ko, Sheng-Hsiung Chen, Li-Chun Tien +1 more | 2023-01-31 |
| 11552068 | Integrated circuit and method of generating integrated circuit layout | Fong-Yuan Chang, Kuo-Nan Yang, Chung-Hsing Wang, Lee-Chung Lu, Sheng-Fong Chen +3 more | 2023-01-10 |
| 11551968 | Inter-wire cavity for low capacitance | Hsiu-Wen Hsueh, Jiing-Feng Yang, Chii-Ping Chen, Chang-Wen Chen, Cai-Ling Wu | 2023-01-10 |