Issued Patents 2023
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11855069 | Cell structure having different poly extension lengths | Jian-Sing Li, Hui-Zhong Zhuang, Chih-Liang Chen | 2023-12-26 |
| 11854973 | Semiconductor device with reduced resistance and method for manufacturing the same | Fei Fan DUAN, Fong-Yuan Chang, Po-Hsiang Huang, Chih-Liang Chen | 2023-12-26 |
| 11854940 | Semiconductor device having self-aligned interconnect structure and method of making | Chih-Yu Lai, Chih-Liang Chen, Shang-Syuan Ciou, Hui-Zhong Zhuang, Ching-Wei Tsai +1 more | 2023-12-26 |
| 11853670 | Arrangement of source or drain conductors of transistor | Chih-Yu Lai, Chih-Liang Chen, Shang-Hsuan CHIU | 2023-12-26 |
| 11842131 | Method and system for generating layout diagram for semiconductor device having engineering change order (ECO) cells | Mao-Wei Chiu, Ting-Wei Chiang, Hui-Zhong Zhuang, Li-Chun Tien | 2023-12-12 |
| 11790151 | System for generating layout diagram including wiring arrangement | Fong-Yuan Chang, Chin-Chou Liu, Hui-Zhong Zhuang, Meng-Kai Hsu, Pin-Dai Sue +3 more | 2023-10-17 |
| 11775727 | Method for generating layout diagram including wiring arrangement | Fong-Yuan Chang, Chin-Chou Liu, Hui-Zhong Zhuang, Meng-Kai Hsu, Pin-Dai Sue +3 more | 2023-10-03 |
| 11768989 | Reduced area standard cell abutment configurations | Hui-Zhong Zhuang, Pin-Dai Sue, Yi-Hsin Ko, Li-Chun Tien | 2023-09-26 |
| 11764213 | Amphi-FET structure, method of making and method of designing | Chih-Yu Lai, Chih-Liang Chen, Shang-Syuan Ciou, Hui-Zhong Zhuang, Ching-Wei Tsai +1 more | 2023-09-19 |
| 11734481 | Metal cut optimization for standard cells | Cheok-Kei Lei, Chi-Lin Liu, Hui-Zhong Zhuang, Zhe-Wei Jiang, Yi-Hsin Ko | 2023-08-22 |
| 11710743 | Integrated circuit | Guo-Huei Wu, Ting Yu Chen, Li-Chun Tien | 2023-07-25 |
| 11705450 | Semiconductor structures and methods of forming the same | Ni-Wan Fan, Jung-Chan Yang, Hsiang-Jen Tseng, Tommy Hu, Wei Ling Chang | 2023-07-18 |
| 11704465 | Integrated circuit, system for and method of forming an integrated circuit | Jung-Chan Yang, Ting-Wei Chiang, Cheng-I Huang, Hui-Zhong Zhuang, Stefan Rusu | 2023-07-18 |
| 11675949 | Space optimization between SRAM cells and standard cells | Feng-Ming Chang, Ruey-Wen Chang, Ping-Wei Wang, Sheng-Hsiung Wang | 2023-06-13 |
| 11637069 | Semiconductor device with V2V rail and methods of making same | Jung-Chan Yang, Hui-Zhong Zhuang, Chih-Liang Chen | 2023-04-25 |
| 11574110 | Method of forming an integrated circuit | Jung-Chan Yang, Ting-Wei Chiang, Jerry Chang Jui Kao, Hui-Zhong Zhuang, Lee-Chung Lu +3 more | 2023-02-07 |
| 11574107 | Method for manufacturing a cell having pins and semiconductor device based on same | Pin-Dai Sue, Po-Hsiang Huang, Fong-Yuan Chang, Sheng-Hsiung Chen, Chin-Chou Liu +4 more | 2023-02-07 |