Issued Patents 2023
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11854909 | Semiconductor structure and method for manufacturing thereof | Man-Ho Kwan, Fu-Wei Yao, Ru-Yi Su, Chun Lin Tsai | 2023-12-26 |
| 11856788 | Semiconductor device and method of fabricating the same | Tzu-Yu Chen, Sheng-Hung Shih, Fu-Chen Chang, Kuo-Chi Tu, Wen-Ting Chu | 2023-12-26 |
| 11855091 | Boundary design for high-voltage integration on HKMG technology | Yi-Huan Chen, Chien-Chih Chou, Kong-Beng Thei, Ming Chyi Liu, Shih-Chung Hsiao +1 more | 2023-12-26 |
| 11854828 | Semiconductor device having metal gate and poly gate | Wei-Cheng Wu, Harry-Hak-Lay Chuang | 2023-12-26 |
| 11823959 | FUSI gated device formation | Yi-Huan Chen, Chien-Chih Chou, Ta-Wei Lin, Hsiao-Chin Tuan, Kong-Beng Thei +1 more | 2023-11-21 |
| 11812616 | Trench gate high voltage transistor for embedded memory | Wei-Cheng Wu, Chien-Hung Chang | 2023-11-07 |
| 11799007 | Thicker corner of a gate dielectric structure around a recessed gate electrode for an MV device | Yi-Huan Chen, Kong-Beng Thei, Chien-Chih Chou, Szu-Hsien Liu, Huan-Chih Yuan | 2023-10-24 |
| 11769792 | Trench capacitor profile to decrease substrate warpage | Hsin-Li Cheng, Jyun-Ying Lin, Shih-Fen Huang, Shu-Hui Su, Ting-Chen Hsu +4 more | 2023-09-26 |
| 11742236 | Structure and method for enhancing robustness of ESD device | Jen-Chou Tseng, Chia-Wei Hsu, Ming-Fu Tsai | 2023-08-29 |
| 11735624 | Multi-lateral recessed MIM structure | Ru-Liang Lee, Ming Chyi Liu, Sheng-Chan Li, Sheng-Chau Chen | 2023-08-22 |
| 11730058 | Integrated heater (and related method) to recover degraded piezoelectric device performance | Chun-Ren Cheng, Chi-Yuan Shih, Kai-Fung Chang, Shih-Fen Huang, Yi-Chuan Teng +3 more | 2023-08-15 |
| 11710712 | Semiconductor device and manufacturing method of the same | Jhu-Min Song, Fu-Jier Fan, Kong-Beng Thei, Hsiao-Chin Tuan | 2023-07-25 |
| 11705449 | Through silicon via design for stacking integrated circuits | Kong-Beng Thei, Dun-Nian Yaung, Fu-Jier Fan, Hsing-Chih Lin, Hsiao-Chin Tuan +2 more | 2023-07-18 |
| 11678493 | Semiconductor structure and manufacturing method of the same | Sheng-Huang Huang, Harry-Hak-Lay Chuang, Jiunyu Tsai, Hung Cho Wang | 2023-06-13 |
| 11675383 | Voltage reference circuit and method for providing reference voltage | Yen-Ting Wang, Alan Roth, Eric Soenen, Liang-Tai Kuo, Hsin-Li Cheng | 2023-06-13 |
| 11646308 | Through silicon via design for stacking integrated circuits | Kong-Beng Thei, Dun-Nian Yaung, Fu-Jier Fan, Hsing-Chih Lin, Hsiao-Chin Tuan +2 more | 2023-05-09 |
| 11600661 | Semiconductor structure integrated with magnetic tunneling junction | Harry-Hak-Lay Chuang, Sheng-Haung Huang, Tien-Wei Chiang | 2023-03-07 |
| 11594484 | Forming bonding structures by using template layer as templates | Mirng-Ji Lii, Chung-Shi Liu, Chin-Yu Ku, Hung-Jui Kuo, Ming-Che Ho +3 more | 2023-02-28 |
| 11581308 | Method for manufacturing semiconductor and structure and operation of the same | Fu-Chun Huang, Ching-Hui Lin, Chun-Ren Cheng, Shih-Fen Huang | 2023-02-14 |