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Package substrate with reduced interconnect stress |
Andrew J. Brown, Sheng Li, Sandeep B. Sane |
2023-11-21 |
| 11705389 |
Vias for package substrates |
Andrew J. Brown, Luke Garner, Liwei Cheng, Cheng Xu, Ying Wang +2 more |
2023-07-18 |
| 11651902 |
Patterning of thin film capacitors in organic substrate packages |
Rahul Jain, Andrew J. Brown, Prithwish Chatterjee, Sai Vadlamani |
2023-05-16 |
| 11610706 |
Release layer-assisted selective embedding of magnetic material in cored and coreless organic substrates |
Sai Vadlamani, Prithwish Chatterjee, Rahul Jain, Kyu Oh Lee, Sheng Li +1 more |
2023-03-21 |
| 11574874 |
Package architecture utilizing photoimageable dielectric (PID) for reduced bump pitch |
Robert Alan May, Sri Ranga Sai Boyapati, Kristof Darmawikarta, Hiroki Tanaka, Srinivas V. Pietambaram +4 more |
2023-02-07 |
| 11552008 |
Asymmetric cored integrated circuit package supports |
Andrew J. Brown, Prithwish Chatterjee, Sai Vadlamani, Ying Wang, Chong Zhang |
2023-01-10 |