Issued Patents 2021
Showing 51–75 of 103 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10991537 | Vertical vacuum channel transistor | Injo Ok, Soon-Cheon Seo, Seyoung Kim | 2021-04-27 |
| 10985315 | Resistive random-access memory | Kangguo Cheng, Juntao Li, Peng Xu | 2021-04-20 |
| 10985069 | Gate stack optimization for wide and narrow nanosheet transistor devices | Jingyun Zhang, Takashi Ando | 2021-04-20 |
| 10985257 | Vertical transport fin field effect transistor with asymmetric channel profile | Brent A. Anderson, Injo Ok, Soon-Cheon Seo | 2021-04-20 |
| 10985273 | Vertical field-effect transistor including a fin having sidewalls with a tapered bottom profile | Chun Wing Yeung, Jingyun Zhang, Robin Hsin Kuo Chao, Heng Wu | 2021-04-20 |
| 10985274 | Reduction of top source/drain external resistance and parasitic capacitance in vertical transistors | Kangguo Cheng, Juntao Li, Shogo Mochizuki | 2021-04-20 |
| 10978571 | Self-aligned contact with metal-insulator transition materials | Kangguo Cheng, Juntao Li, Peng Xu | 2021-04-13 |
| 10978356 | Tri-layer STI liner for nanosheet leakage control | Xin Miao, Alexander Reznicek, Jingyun Zhang | 2021-04-13 |
| 10978572 | Self-aligned contact with metal-insulator transition materials | Kangguo Cheng, Juntao Li, Peng Xu | 2021-04-13 |
| 10971584 | Low contact resistance nanowire FETs | Peng Xu, Juntao Li, Kangguo Cheng | 2021-04-06 |
| 10971362 | Extreme ultraviolet patterning process with resist hardening | Chanro Park, Ruilong Xie, Kangguo Cheng | 2021-04-06 |
| 10971407 | Method of forming a complementary metal oxide semiconductor device having fin field effect transistors with a common metal gate | Takashi Ando, Pouya Hashemi, Jingyun Zhang | 2021-04-06 |
| 10971593 | Oxygen reservoir for low threshold voltage P-type MOSFET | Takashi Ando, Jingyun Zhang | 2021-04-06 |
| 10971585 | Gate spacer and inner spacer formation for nanosheet transistors having relatively small space between adjacent gates | Injo Ok, Soon-Cheon Seo, Wenyu Xu | 2021-04-06 |
| 10957698 | Reduction of multi-threshold voltage patterning damage in nanosheet device structure | Kangguo Cheng, Juntao Li, Shogo Mochizuki | 2021-03-23 |
| 10957778 | Formation of air gap spacers for reducing parasitic capacitance | Kangguo Cheng, Peng Xu, Heng Wu | 2021-03-23 |
| 10957742 | Resistive random-access memory array with reduced switching resistance variability | Takashi Ando, Seyoung Kim, Wilfried E. Haensch | 2021-03-23 |
| 10950549 | ILD gap fill for memory device stack array | Soon-Cheon Seo, Injo Ok, Alexander Reznicek | 2021-03-16 |
| 10943816 | Mask removal for tight-pitched nanostructures | Juntao Li, Kangguo Cheng | 2021-03-09 |
| 10943924 | Semiconductor-on-insulator finFET devices with high thermal conductivity dielectrics | Sanghoon Shin, Takashi Ando | 2021-03-09 |
| 10943903 | Asymmetric threshold voltage VTFET with intrinsic dual channel epitaxy | Jingyun Zhang, Takashi Ando, Alexander Reznicek, Pouya Hashemi | 2021-03-09 |
| 10943835 | Fabrication of silicon germanium channel and silicon/silicon germanium dual channel field-effect transistors | Kangguo Cheng, Juntao Li, Shogo Mochizuki | 2021-03-09 |
| 10943787 | Confined work function material for gate-all around transistor devices | Jingyun Zhang, Takashi Ando, Alexander Reznicek, Pouya Hashemi | 2021-03-09 |
| 10937862 | Nanosheet substrate isolated source/drain epitaxy via airgap | Alexander Reznicek, Xin Miao, Jingyun Zhang | 2021-03-02 |
| 10937883 | Vertical transport FETs having a gradient threshold voltage | Takashi Ando, Jingyun Zhang, Pouya Hashemi, Alexander Reznicek | 2021-03-02 |