SS

Soon-Cheon Seo

IBM: 12 patents #328 of 11,638Top 3%
ET Elpis Technologies: 2 patents #4 of 38Top 15%
TE Tessera: 1 patents #27 of 70Top 40%
Overall (2021): #3,375 of 548,734Top 1%
15
Patents 2021

Issued Patents 2021

Patent #TitleCo-InventorsDate
11201092 Gate channel length control in VFET Injo Ok, Choonghyun Lee, Alexander Reznicek 2021-12-14
11196000 Low forming voltage non-volatile memory (NVM) Youngseok Kim, Injo Ok, Alexander Reznicek 2021-12-07
11139380 Vertical fin-type bipolar junction transistor with self-aligned base contact Choonghyun Lee, Seyoung Kim, Injo Ok 2021-10-05
11069686 Techniques for enhancing vertical gate-all-around FET performance Injo Ok, Choonghyun Lee, Seyoung Kim 2021-07-20
11043598 Vertical field effect transistor with low-resistance bottom source-drain contact Choonghyun Lee, Injo Ok, Alexander Reznicek 2021-06-22
11038055 Method and structure of improving contact resistance for passive and long channel devices Injo Ok, Balasubramanian Pranatharthiharan, Charan V. Surisetty 2021-06-15
11038064 Vertical nano-wire complimentary metal-oxide-semiconductor transistor with cylindrical III-V compound and germanium channel Injo Ok, Choonghyun Lee 2021-06-15
11031396 Spacer for dual epi CMOS devices 2021-06-08
11011429 Minimize middle-of-line contact line shorts Injo Ok, Balasubramanian Pranatharthiharan, Charan V. Surisetty 2021-05-18
10991537 Vertical vacuum channel transistor Injo Ok, Choonghyun Lee, Seyoung Kim 2021-04-27
10985257 Vertical transport fin field effect transistor with asymmetric channel profile Choonghyun Lee, Brent A. Anderson, Injo Ok 2021-04-20
10971585 Gate spacer and inner spacer formation for nanosheet transistors having relatively small space between adjacent gates Choonghyun Lee, Injo Ok, Wenyu Xu 2021-04-06
10957536 Removal of trilayer resist without damage to underlying structure Muthumanickam Sankarapandian, Indira Seshadri, John R. Sporre 2021-03-23
10950549 ILD gap fill for memory device stack array Injo Ok, Alexander Reznicek, Choonghyun Lee 2021-03-16
10937861 Semiconductor structures including middle-of-line (MOL) capacitance reduction for self-aligned contact in gate stack Injo Ok, Balasubramanian Pranatharthiharan, Charan V. V. S. Surisetty 2021-03-02